drm/amd/display: Re-arrange GFX9 fields

For more clear usage in future

Signed-off-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
index 7825e4b5e97c4c888c59dc55a7ee42c0472fb01c..9ddfe4c6938b5a1f65e65eb4e196e9899f4ad008 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
@@ -358,15 +358,16 @@ union dc_tiling_info {
        } gfx8;
 
        struct {
+               enum swizzle_mode_values swizzle;
                unsigned int num_pipes;
-               unsigned int num_banks;
+               unsigned int max_compressed_frags;
                unsigned int pipe_interleave;
+
+               unsigned int num_banks;
                unsigned int num_shader_engines;
                unsigned int num_rb_per_se;
-               unsigned int max_compressed_frags;
                bool shaderEnable;
 
-               enum swizzle_mode_values swizzle;
                bool meta_linear;
                bool rb_aligned;
                bool pipe_aligned;