wil->txrx_ops.configure_interrupt_moderation(wil);
 
+               /* Enable OFU rdy valid bug fix, to prevent hang in oful34_rx
+                * while there is back-pressure from Host during RX
+                */
+               if (wil->hw_version >= HW_VER_TALYN_MB)
+                       wil_s(wil, RGF_DMA_MISC_CTL,
+                             BIT_OFUL34_RDY_VALID_BUG_FIX_EN);
+
                rc = wil_restore_vifs(wil);
                if (rc) {
                        wil_err(wil, "failed to restore vifs, rc %d\n", rc);
 
 #include "trace.h"
 
 #define WIL_EDMA_MAX_DATA_OFFSET (2)
+/* RX buffer size must be aligned to 4 bytes */
+#define WIL_EDMA_RX_BUF_LEN_DEFAULT (2048)
 
 static void wil_tx_desc_unmap_edma(struct device *dev,
                                   union wil_tx_desc *desc,
                                   struct wil_ring *ring, u32 i)
 {
        struct device *dev = wil_to_dev(wil);
-       unsigned int sz = wil->rx_buf_len + ETH_HLEN +
-               WIL_EDMA_MAX_DATA_OFFSET;
+       unsigned int sz = ALIGN(wil->rx_buf_len, 4);
        dma_addr_t pa;
        u16 buff_id;
        struct list_head *active = &wil->rx_buff_mgmt.active;
 static void wil_rx_buf_len_init_edma(struct wil6210_priv *wil)
 {
        wil->rx_buf_len = rx_large_buf ?
-               WIL_MAX_ETH_MTU : TXRX_BUF_LEN_DEFAULT - WIL_MAX_MPDU_OVERHEAD;
+               WIL_MAX_ETH_MTU : WIL_EDMA_RX_BUF_LEN_DEFAULT;
 }
 
 static int wil_rx_init_edma(struct wil6210_priv *wil, u16 desc_ring_size)
 
        wil_rx_buf_len_init_edma(wil);
 
-       max_rx_pl_per_desc = wil->rx_buf_len + ETH_HLEN +
-               WIL_EDMA_MAX_DATA_OFFSET;
+       max_rx_pl_per_desc = ALIGN(wil->rx_buf_len, 4);
 
        /* Use debugfs dbg_num_rx_srings if set, reserve one sring for TX */
        if (wil->num_rx_status_rings > WIL6210_MAX_STATUS_RINGS - 1)
        struct sk_buff *skb;
        dma_addr_t pa;
        struct wil_ring_rx_data *rxdata = &sring->rx_data;
-       unsigned int sz = wil->rx_buf_len + ETH_HLEN +
-               WIL_EDMA_MAX_DATA_OFFSET;
+       unsigned int sz = ALIGN(wil->rx_buf_len, 4);
        struct wil_net_stats *stats = NULL;
        u16 dmalen;
        int cid;
 
        #define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER              BIT(2)
        #define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR                  BIT(3)
        #define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH        BIT(4)
+#define RGF_DMA_MISC_CTL                               (0x881d6c)
+       #define BIT_OFUL34_RDY_VALID_BUG_FIX_EN                 BIT(7)
 
 #define RGF_DMA_PSEUDO_CAUSE           (0x881c68)
 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW   (0x881c6c)