On STM32MP25 SoC, the syscfg peripheral provides a clock to the display
subsystem through a multiplexer. Since it only provides a single clock,
the cell value is 0.
Doing so allows the clock consumers to reach the peripheral and gate the
clock accordingly.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Yannick Fertre <yannick.fertre@foss.st.com>
Acked-by: Christophe Roullier <christophe.roullier@foss.st.com>
Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-6-9c825e28f733@foss.st.com
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
clocks:
maxItems: 1
+ "#clock-cells":
+ const: 0
+
required:
- compatible
- reg
-if:
- properties:
- compatible:
- contains:
- enum:
- - st,stm32mp157-syscfg
- - st,stm32f4-gcan
-then:
- required:
- - clocks
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - st,stm32mp157-syscfg
+ - st,stm32f4-gcan
+ then:
+ required:
+ - clocks
+ - if:
+ properties:
+ compatible:
+ const: st,stm32mp25-syscfg
+ then:
+ required:
+ - "#clock-cells"
additionalProperties: false