atomic_t tfm_count ____cacheline_aligned;
 
        /* Job ring info */
-       int ringsize;   /* Size of rings (assume input = output) */
        struct caam_jrentry_info *entinfo;      /* Alloc'ed 1 per ring entry */
        spinlock_t inplock ____cacheline_aligned; /* Input ring index lock */
-       int inp_ring_write_index;       /* Input index "tail" */
        u32 inpring_avail;      /* Number of free entries in input ring */
        int head;                       /* entinfo (s/w ring) head index */
        dma_addr_t *inpring;    /* Base of input ring, alloc DMA-safe */
 
        head_entry->cbkarg = areq;
        head_entry->desc_addr_dma = desc_dma;
 
-       jrp->inpring[jrp->inp_ring_write_index] = cpu_to_caam_dma(desc_dma);
+       jrp->inpring[head] = cpu_to_caam_dma(desc_dma);
 
        /*
         * Guarantee that the descriptor's DMA address has been written to
         */
        smp_wmb();
 
-       jrp->inp_ring_write_index = (jrp->inp_ring_write_index + 1) &
-                                   (JOBR_DEPTH - 1);
        jrp->head = (head + 1) & (JOBR_DEPTH - 1);
 
        /*
                jrp->entinfo[i].desc_addr_dma = !0;
 
        /* Setup rings */
-       jrp->inp_ring_write_index = 0;
        jrp->out_ring_read_index = 0;
        jrp->head = 0;
        jrp->tail = 0;
        wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH);
        wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH);
 
-       jrp->ringsize = JOBR_DEPTH;
        jrp->inpring_avail = JOBR_DEPTH;
 
        spin_lock_init(&jrp->inplock);