]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
ARM: dts: stm32: Add ethernet support for DH STM32MP13xx DHCOR DHSBC board
authorMarek Vasut <marex@denx.de>
Sun, 23 Jun 2024 19:51:56 +0000 (21:51 +0200)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Fri, 5 Jul 2024 12:45:24 +0000 (14:45 +0200)
Add ethernet support for the DH STM32MP13xx DHCOR DHSBC carrier board.
This carrier board is populated with two gigabit ethernet ports and two
Realtek RTL8211F PHYs, both are described in this DT patch.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts

index 5f4f6b6e427a597fa801a409b008add27889f7bf..bacb70b4256bc3e5c023bea8a54f77d5de3fc78b 100644 (file)
@@ -22,6 +22,8 @@
                     "st,stm32mp135";
 
        aliases {
+               ethernet0 = &ethernet1;
+               ethernet1 = &ethernet2;
                serial2 = &usart1;
                serial3 = &usart2;
        };
        };
 };
 
+&ethernet1 {
+       phy-handle = <&ethphy1>;
+       phy-mode = "rgmii-id";
+       pinctrl-0 = <&eth1_rgmii_pins_a>;
+       pinctrl-1 = <&eth1_rgmii_sleep_pins_a>;
+       pinctrl-names = "default", "sleep";
+       st,ext-phyclk;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "snps,dwmac-mdio";
+
+               ethphy1: ethernet-phy@1 {
+                       /* RTL8211F */
+                       compatible = "ethernet-phy-id001c.c916";
+                       interrupt-parent = <&gpiog>;
+                       interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
+                       reg = <1>;
+                       reset-assert-us = <15000>;
+                       reset-deassert-us = <55000>;
+                       reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+&ethernet2 {
+       phy-handle = <&ethphy2>;
+       phy-mode = "rgmii-id";
+       pinctrl-0 = <&eth2_rgmii_pins_a>;
+       pinctrl-1 = <&eth2_rgmii_sleep_pins_a>;
+       pinctrl-names = "default", "sleep";
+       st,ext-phyclk;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "snps,dwmac-mdio";
+
+               ethphy2: ethernet-phy@1 {
+                       /* RTL8211F */
+                       compatible = "ethernet-phy-id001c.c916";
+                       interrupt-parent = <&gpiog>;
+                       interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
+                       reg = <1>;
+                       reset-assert-us = <15000>;
+                       reset-deassert-us = <55000>;
+                       reset-gpios = <&gpiog 8 GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
 &gpioa {
        gpio-line-names = "", "", "", "",
                          "", "DHSBC_USB_PWR_CC1", "", "",