drm/amdgpu: enable IH doorbell for ring 1&2 on Vega

The doorbells should already be reserved, just enable them.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
index cc967dbfd631d352eea1bca20713903667ebebac..6590143c3f7516ab1f532f5ad0a111b8005a8073 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
@@ -118,7 +118,8 @@ static void nbio_v6_1_ih_doorbell_range(struct amdgpu_device *adev,
 
        if (use_doorbell) {
                ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index);
-               ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 2);
+               ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range,
+                                                 BIF_IH_DOORBELL_RANGE, SIZE, 6);
        } else
                ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0);
 

diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index d4a3cc413af88b0204d87dc92a4cb9505a479289..fa45234f020f148b45a0d590b0b338ba1e60bb49 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
@@ -136,6 +136,25 @@ static uint32_t vega10_ih_rb_cntl(struct amdgpu_ih_ring *ih, uint32_t ih_rb_cntl
        return ih_rb_cntl;
 }
 
+static uint32_t vega10_ih_doorbell_rptr(struct amdgpu_ih_ring *ih)
+{
+       u32 ih_doorbell_rtpr = 0;
+
+       if (ih->use_doorbell) {
+               ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr,
+                                                IH_DOORBELL_RPTR, OFFSET,
+                                                ih->doorbell_index);
+               ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr,
+                                                IH_DOORBELL_RPTR,
+                                                ENABLE, 1);
+       } else {
+               ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr,
+                                                IH_DOORBELL_RPTR,
+                                                ENABLE, 0);
+       }
+       return ih_doorbell_rtpr;
+}
+
 /**
  * vega10_ih_irq_init - init and enable the interrupt ring
  *
@@ -150,8 +169,8 @@ static uint32_t vega10_ih_rb_cntl(struct amdgpu_ih_ring *ih, uint32_t ih_rb_cntl
 static int vega10_ih_irq_init(struct amdgpu_device *adev)
 {
        struct amdgpu_ih_ring *ih;
+       u32 ih_rb_cntl;
        int ret = 0;
-       u32 ih_rb_cntl, ih_doorbell_rtpr;
        u32 tmp;
 
        /* disable irqs */
@@ -177,23 +196,11 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
                     upper_32_bits(ih->wptr_addr) & 0xFFFF);
 
        /* set rptr, wptr to 0 */
-       WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, 0);
        WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR, 0);
+       WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, 0);
 
-       ih_doorbell_rtpr = RREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR);
-       if (adev->irq.ih.use_doorbell) {
-               ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr,
-                                                IH_DOORBELL_RPTR, OFFSET,
-                                                adev->irq.ih.doorbell_index);
-               ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr,
-                                                IH_DOORBELL_RPTR,
-                                                ENABLE, 1);
-       } else {
-               ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr,
-                                                IH_DOORBELL_RPTR,
-                                                ENABLE, 0);
-       }
-       WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR, ih_doorbell_rtpr);
+       WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR,
+                    vega10_ih_doorbell_rptr(ih));
 
        ih = &adev->irq.ih1;
        if (ih->ring_size) {
@@ -210,8 +217,11 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
                WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl);
 
                /* set rptr, wptr to 0 */
-               WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING1, 0);
                WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR_RING1, 0);
+               WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING1, 0);
+
+               WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR_RING1,
+                            vega10_ih_doorbell_rptr(ih));
        }
 
        ih = &adev->irq.ih2;
@@ -220,13 +230,16 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
                WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE_HI_RING2,
                             (ih->gpu_addr >> 40) & 0xff);
 
-               ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);
+               ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2);
                ih_rb_cntl = vega10_ih_rb_cntl(ih, ih_rb_cntl);
                WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl);
 
                /* set rptr, wptr to 0 */
-               WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING2, 0);
                WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR_RING2, 0);
+               WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING2, 0);
+
+               WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR_RING2,
+                            vega10_ih_doorbell_rptr(ih));
        }
 
        tmp = RREG32_SOC15(OSSSYS, 0, mmIH_STORM_CLIENT_LIST_CNTL);
@@ -453,19 +466,26 @@ static int vega10_ih_sw_init(void *handle)
        if (r)
                return r;
 
+       adev->irq.ih.use_doorbell = true;
+       adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1;
+
        if (adev->asic_type == CHIP_VEGA10) {
                r = amdgpu_ih_ring_init(adev, &adev->irq.ih1, PAGE_SIZE, true);
                if (r)
                        return r;
 
+               adev->irq.ih1.use_doorbell = true;
+               adev->irq.ih1.doorbell_index =
+                       (adev->doorbell_index.ih + 1) << 1;
+
                r = amdgpu_ih_ring_init(adev, &adev->irq.ih2, PAGE_SIZE, true);
                if (r)
                        return r;
-       }
 
-       /* TODO add doorbell for IH1 & IH2 as well */
-       adev->irq.ih.use_doorbell = true;
-       adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1;
+               adev->irq.ih2.use_doorbell = true;
+               adev->irq.ih2.doorbell_index =
+                       (adev->doorbell_index.ih + 2) << 1;
+       }
 
        r = amdgpu_irq_init(adev);