Modifications for 1.2.0:
======================================================================
+* Fix LED handling for CCM/SCM boards;
+ add HW Info block processing for CCM/SCM boards
+ (using common source file)
+
+* Support for ICU862 version 1.5 board with 100 MHz MPC862
+
+* Patch by Woo-Seung Yeo, 10 Jul 2002:
+ fix duart serial initialization in EVB64260 board
+
+* Make "ppc_8xx-" the default value for CROSS_COMPILE
+ (as used by HLL and ELDK)
+
+* Support both SCC and FEC ethernet interfaces on TQM8xxL
+
+* Patches by Keith Outwater, 25 Jun 2002:
+ - Fix typos in README; add documentation for console options,
+ FPGA configuration driver, EEPROM options
+
+ - Merged FPGA driver posted by Rich Ireland; added Xilinx Virtex II
+ support; added FPGA configuration via TFTP. FPGA driver has been
+ verified working with a Xilinx Virtex II FPGA (XC2V3000) device.
+ See GEN860T board for an example of the FPGA driver usage.
+
+* Patch by Pierre Aubert, 24 Jun 2002:
+ Fix i2c_read() usage on RPXClassic
+
* Patch by Stefan Roese, 28 Jun 2002:
-- CPCI4052 (Version 2) changed to 256KByte PPCBoot size.
-- ppc405: sdram init code (for onboard soldered sdram bank0)
- ported from assembler to C and moved from board to cpu directory
- (define CONFIG_SDRAM_BANK0). Now init.S in board directory isn't
- needed any more (see CPCI405).
+ - CPCI4052 (Version 2) changed to 256KByte PPCBoot size.
+ - ppc405: sdram init code (for onboard soldered sdram bank0)
+ ported from assembler to C and moved from board to cpu directory
+ (define CONFIG_SDRAM_BANK0). Now init.S in board directory isn't
+ needed any more (see CPCI405).
* Patch by Pierre Aubert / Steven Scholz:
Remove duplicate / broken code in cpu/mpc8xx/fec.c
E: frank.morauf@salzbrenner.com
D: Support for Embedded Planet RPX Super Board
+N: Keith Outwater
+E: Keith_Outwater@mvis.com
+D: Support for GEN860T board
+
N: Frank Panno
E: fpanno@delphintech.com
D: Support for Embedded Planet EP8260 Board
MVS1 MPC823
+Keith Outwater <Keith_Outwater@mvis.com>
+
+ GEN860T MPC860T
+
-------------------------------------------------------------------------
Unknown / orphaned boards:
ADS860 AMX860 c2mon CCM \
cogent_mpc8xx ESTEEM192E ETX094 FADS823 \
FADS850SAR FADS860T FLAGADM FPS850L \
- GENIETV GTH hermes IAD210 \
- ICU862 IP860 IVML24 IVML24_128 \
- IVML24_256 IVMS8 IVMS8_128 IVMS8_256 \
- LANTEC lwmon MBX MBX860T \
- MHPC MVS1 NX823 pcu_e \
- RPXClassic RPXlite SM850 SPD823TS \
- SXNI855T TQM823L TQM823L_LCD TQM850L \
- TQM855L TQM860L TQM860L_FEC TTTech \
+ GEN860T GENIETV GTH hermes \
+ IAD210 ICU862_100MHz IP860 IVML24 \
+ IVML24_128 IVML24_256 IVMS8 IVMS8_128 \
+ IVMS8_256 LANTEC lwmon MBX \
+ MBX860T MHPC MVS1 NX823 \
+ pcu_e RPXClassic RPXlite SM850 \
+ SPD823TS SXNI855T TQM823L TQM823L_LCD \
+ TQM850L TQM855L TQM860L TQM860L_FEC \
+ TTTech \
"
#########################################################################
${MAKE} distclean >/dev/null
${MAKE} ${target}_config
${MAKE} all 2>&1 >LOG/$target.MAKELOG | tee LOG/$target.ERR
- ${CROSS_COMPILE:-powerpc-linux-}size ppcboot | tee -a LOG/$target.MAKELOG
+ ${CROSS_COMPILE:-ppc_8xx-}size ppcboot | tee -a LOG/$target.MAKELOG
}
#-----------------------------------------------------------------------
ifeq ($(HOSTARCH),ppc)
CROSS_COMPILE =
else
-CROSS_COMPILE = powerpc-$(HOSTOS)-
+CROSS_COMPILE = ppc_8xx-
endif
endif
echo "VENDOR = siemens" >>config.mk ; \
echo "#include <config_$(@:_config=).h>" >config.h
+xtract_ICU862 = $(subst _100MHz,,$(subst _config,,$1))
+
+ICU862_100MHz_config \
ICU862_config: unconfig
- @echo "Configuring for $(@:_config=) Board..." ; \
+ @echo "Configuring for $(call xtract_ICU862,$@) Board..." ; \
cd ./include ; \
echo "ARCH = ppc" > config.mk ; \
echo "BOARD = icu862" >>config.mk ; \
- echo "CPU = mpc8xx" >>config.mk ; \
- echo "#include <config_$(@:_config=).h>" >config.h
+ echo "CPU = mpc8xx" >>config.mk ;
+ @echo "/* Automatically generated - do not edit */" >include/config.h
+ @[ -z "$(findstring _100MHz,$@)" ] || \
+ { echo "#define CONFIG_100MHz" >>include/config.h ; \
+ echo "... with 100MHz system clock" ; \
+ }
+ @echo "#include <config_$(call xtract_ICU862,$@).h>" >>include/config.h
IP860_config : unconfig
@echo "Configuring for $(@:_config=) Board..." ; \
=======
In general, all boards for which a configuration option exists in the
-Makefile have been tested to some extend and can be sonsidered
+Makefile have been tested to some extent and can be considered
"working". In fact, many of them are used in production systems.
In case of problems see the CHANGELOG and CREDITS files to find out
- board Board dependend files
- common Misc architecture independend functions
-- cpu CPU specificfiles
+- cpu CPU specific files
+- disk Code for disk drive partition handling
- doc Documentation (don't expect too much)
+- drivers Common used device drivers
+- dtt Digital Thermometer and Thermostat drivers
- examples Example code for standalone applications, etc.
- include Header Files
- disk Harddisk interface code
- net Networking code
- ppc Files generic to PowerPC architecture
+- rtc Real Time Clock drivers
- tools Tools to build S-Record or PPCBoot images, etc.
+- cpu/74xx_7xx Files specific to Motorola MPC74xx and 7xx CPUs
- cpu/mpc8xx Files specific to Motorola MPC8xx CPUs
- cpu/mpc824x Files specific to Motorola MPC824x CPUs
- cpu/mpc8260 Files specific to Motorola MPC8260 CPU
-- cpu/mpc74xx Files specific to Motorola MPC74xx CPUs
- cpu/ppc4xx Files specific to IBM 4xx CPUs
+- board/RPXClassic
+ Files specific to RPXClassic boards
+- board/RPXlite Files specific to RPXlite boards
+- board/c2mon Files specific to c2mon boards
- board/cogent Files specific to Cogent boards
(need further configuration)
Files specific to CPCIISER4 boards
+- board/cpu86 Files specific to CPU86 boards
+- board/cray/ Files specific to boards manufactured by Cray
+- board/cray/L1 Files specific to L1 boards
- board/cu824 Files specific to CU824 boards
- board/eric Files specific to ERIC boards
- board/esd/ Files specific to boards manufactured by ESD
- board/esd/cpci405 Files specific to CPCI405 boards
- board/esd/cpciiser4 Files specific to CPCIISER4 boards
- board/esd/common Common files for ESD boards
+- board/esd/dasa_sim Files specific to DASA_SIM boards
+- board/esd/du405 Files specific to DU405 boards
+- board/esd/ocrtc Files specific to OCRTC boards
+- board/esd/pci405 Files specific to PCI405 boards
- board/esteem192e
Files specific to ESTEEM192E boards
- board/etx094 Files specific to ETX_094 boards
Files specific to EVB64260 boards
- board/fads Files specific to FADS boards
- board/flagadm Files specific to FLAGADM boards
+- board/gen860t Files specific to GEN860T boards
- board/genietv Files specific to GENIETV boards
- board/gth Files specific to GTH boards
- board/hermes Files specific to HERMES boards
- board/hymod Files specific to HYMOD boards
+- board/icu862 Files specific to ICU862 boards
- board/ip860 Files specific to IP860 boards
-- board/ivms8 Files specific to IVMS8/IVML24 boards
+- board/iphase4539
+ Files specific to Interphase4539 boards
+- board/ivm Files specific to IVMS8/IVML24 boards
- board/lantec Files specific to LANTEC boards
- board/lwmon Files specific to LWMON boards
- board/mbx8xx Files specific to MBX boards
+- board/mpc8260ads
+ Files specific to MMPC8260ADS boards
+- board/mpl/ Files specific to boards manufactured by MPL
- board/mpl/common Common files for MPL boards
- board/mpl/pip405 Files specific to PIP405 boards
- board/mpl/mip405 Files specific to MIP405 boards
-- board/RPXlite Files specific to RPXlite boards
+- board/musenki Files specific to MUSEKNI boards
+- board/mvs1 Files specific to MVS1 boards
+- board/nx823 Files specific to NX823 boards
+- board/oxc Files specific to OXC boards
+- board/pcippc2 Files specific to PCIPPC2/PCIPPC6 boards
+- board/pm826 Files specific to PM826 boards
+- board/ppmc8260
+ Files specific to PPMC8260 boards
- board/rpxsuper
Files specific to RPXsuper boards
- board/rsdproto
Files specific to RSDproto boards
- board/sandpoint
Files specific to Sandpoint boards
+- board/sbc8260 Files specific to SBC8260 boards
- board/siemens Files specific to boards manufactured by Siemens AG
- board/siemens/CCM Files specific to CCM boards
+- board/siemens/IAD210 Files specific to IAD210 boards
+- board/siemens/SCM Files specific to SCM boards
- board/siemens/pcu_e Files specific to PCU_E boards
-- board/sbc8260 Files specific to BC8260 boards
-
- board/sixnet Files specific to SIXNET boards
- board/spd8xx Files specific to SPD8xxTS boards
- board/tqm8260 Files specific to TQM8260 boards
- board/tqm8xx Files specific to TQM8xxL boards
+- board/w7o Files specific to W7O boards
- board/walnut405
Files specific to Walnut405 boards
+- board/westel/ Files specific to boards manufactured by Westel Wireless
+- board/westel/amx860 Files specific to AMX860 boards
Software Configuration:
- Board Type: Define exactly one of
- CONFIG_ADCIOP, CONFIG_FADS, CONFIG_RPXLITE,
- CONFIG_ADS, CONFIG_FPS850L, CONFIG_RPXSUPER,
- CONFIG_BSEIP, CONFIG_HERMES, CONFIG_SANDPOINT,
- CONFIG_CCM, CONFIG_HYMOD, CONFIG_SBC8260,
- CONFIG_COGENT, CONFIG_IP860, CONFIG_SM850,
- CONFIG_COGENT, CONFIG_IVMS8, CONFIG_SPD823TS,
- CONFIG_CPCI405, CONFIG_MBX, CONFIG_SXNI855T,
- CONFIG_CU824, CONFIG_MIP405, CONFIG_TQM823L,
- CONFIG_ERIC, CONFIG_PCU_E, CONFIG_TQM8260,
- CONFIG_ETX094, CONFIG_PIP405, CONFIG_TQM850L,
- CONFIG_EVB64260, CONFIG_RDSPROTO, CONFIG_TQM855L,
- CONFIG_EVB64260, CONFIG_RPXCLASSIC, CONFIG_TQM860L
+ CONFIG_ADCIOP, CONFIG_IP860, CONFIG_RPXsuper,
+ CONFIG_ADS860, CONFIG_IPHASE4539, CONFIG_SM850,
+ CONFIG_AMX860, CONFIG_IVML24, CONFIG_SPD823TS,
+ CONFIG_AR405, CONFIG_IVML24_128, CONFIG_SXNI855T,
+ CONFIG_BAB750, CONFIG_IVML24_256, CONFIG_Sandpoint8240,
+ CONFIG_CANBT, CONFIG_IVMS8, CONFIG_Sandpoint8245,
+ CONFIG_CCM, CONFIG_IVMS8_128, CONFIG_TQM823L,
+ CONFIG_CPCI405, CONFIG_IVMS8_256, CONFIG_TQM850L,
+ CONFIG_CPCI4052, CONFIG_LANTEC, CONFIG_TQM855L,
+ CONFIG_CPCIISER4, CONFIG_MBX, CONFIG_TQM860L,
+ CONFIG_CPU86, CONFIG_MBX860T, CONFIG_TQM8260,
+ CONFIG_CRAYL1, CONFIG_MHPC, CONFIG_TTTech,
+ CONFIG_CU824, CONFIG_MIP405, CONFIG_W7OLMC,
+ CONFIG_DASA_SIM, CONFIG_MOUSSE, CONFIG_W7OLMG,
+ CONFIG_DU405, CONFIG_MPC8260ADS, CONFIG_WALNUT405,
+ CONFIG_ERIC, CONFIG_MUSENKI, CONFIG_ZUMA,
+ CONFIG_ESTEEM192E, CONFIG_MVS1, CONFIG_c2mon,
+ CONFIG_ETX094, CONFIG_NX823, CONFIG_cogent_mpc8260,
+ CONFIG_EVB64260, CONFIG_OCRTC, CONFIG_cogent_mpc8xx,
+ CONFIG_FADS823, CONFIG_ORSG, CONFIG_ep8260,
+ CONFIG_FADS850SAR, CONFIG_OXC, CONFIG_gw8260,
+ CONFIG_FADS860T, CONFIG_PCI405, CONFIG_hermes,
+ CONFIG_FLAGADM, CONFIG_PCIPPC2, CONFIG_hymod,
+ CONFIG_FPS850L, CONFIG_PCIPPC6, CONFIG_lwmon,
+ CONFIG_GEN860T, CONFIG_PIP405, CONFIG_pcu_e,
+ CONFIG_GENIETV, CONFIG_PM826, CONFIG_ppmc8260,
+ CONFIG_GTH, CONFIG_RPXClassic, CONFIG_rsdproto,
+ CONFIG_IAD210, CONFIG_RPXlite, CONFIG_sbc8260,
+ CONFIG_ICU862
- CPU Module Type: (if CONFIG_COGENT is defined)
Define exactly one of
CFG_CMD_ENV saveenv
CFG_CMD_FDC * Floppy Disk Support
CFG_CMD_FLASH flinfo, erase, protect
+ CFG_CMD_FPGA FPGA device initialization support
CFG_CMD_I2C * I2C serial bus support
CFG_CMD_IDE * IDE harddisk support
CFG_CMD_IMI iminfo
CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
CONFIG_RTC_MC146818 - use MC146818 RTC
+ CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
- Partition Support:
CONFIG_MAC_PARTITION and/or CONFIG_DOS_PARTITION
CONFIG_HARD_I2C
Selects the CPM hardware driver for I2C.
-
+
CONFIG_SOFT_I2C
Use software (aka bit-banging) driver instead of CPM
Enables extended (16-bit) SPI EEPROM addressing.
(symmetrical to CONFIG_I2C_X)
+- FPGA Support: CONFIG_FPGA_COUNT
+
+ Specify the number of FPGA devices to support.
+
+ CONFIG_FPGA
+
+ Used to specify the types of FPGA devices. For
+ example,
+ #define CONFIG_FPGA CFG_XILINX_VIRTEX2
+
+ CFG_FPGA_PROG_FEEDBACK
+
+ Enable printing of hash marks during FPGA
+ configuration.
+
+ CFG_FPGA_CHECK_BUSY
+
+ Enable checks on FPGA configuration interface busy
+ status by the configuration function. This option
+ will require a board or device specific function to
+ be written.
+
+ CONFIG_FPGA_DELAY
+
+ If defined, a function that provides delays in the
+ FPGA configuration driver.
+
+ CFG_FPGA_CHECK_CTRLC
+
+ Allow Control-C to interrupt FPGA configuration
+
+ CFG_FPGA_CHECK_ERROR
+
+ Check for configuration errors during FPGA bitfile
+ loading. For example, abort during Virtex II
+ configuration if the INIT_B line goes low (which
+ indicated a CRC error).
+
+ CFG_FPGA_WAIT_INIT
+
+ Maximum time to wait for the INIT_B line to deassert
+ after PROB_B has been deasserted during a Virtex II
+ FPGA configuration sequence. The default time is 500 mS.
+
+ CFG_FPGA_WAIT_BUSY
+
+ Maximum time to wait for BUSY to deassert during
+ Virtex II FPGA configuration. The default is 5 mS.
+
+ CFG_FPGA_WAIT_CONFIG
+
+ Time to wait after FPGA configuration. The default is
+ 200 mS.
+
- Configuration Management:
CONFIG_IDENT_STRING
- If defined, this string will be added to the PPCBoot
- version information (PPCBOOT_VERSION)
+ If defined, this string will be added to the PPCBoot
+ version information (PPCBOOT_VERSION)
- Vendor Parameter Protection:
- PPCBoot considers the values of the environment
- variables "serial#" (Board Serial Number) and
- "ethaddr" (Ethernet Address) to bb parameters that
- are set once by the board vendor / manufacturer, and
- protects these variables from casual modification by
- the user. Once set, these variables are read-only,
- and write or delete attempts are rejected. You can
- change this behviour:
+ PPCBoot considers the values of the environment
+ variables "serial#" (Board Serial Number) and
+ "ethaddr" (Ethernet Address) to bb parameters that
+ are set once by the board vendor / manufacturer, and
+ protects these variables from casual modification by
+ the user. Once set, these variables are read-only,
+ and write or delete attempts are rejected. You can
+ change this behviour:
If CONFIG_ENV_OVERWRITE is #defined in your config
file, the write protection for vendor parameters is
constructs ("shell scripts").
If undefined, you get the old, much simpler behaviour
- with a somewhat smapper memory footprint.
+ with a somewhat smaller memory footprint.
CFG_PROMPT_HUSH_PS2
- CFG_BARGSIZE: Buffer size for Boot Arguments which are passed to
the application (usually a Linux kernel) when it is
- bootet
+ booted
- CFG_BAUDRATE_TABLE:
List of legal baudrate settings for this board.
+- CFG_CONSOLE_INFO_QUIET
+ Suppress display of console information at boot.
+
+- CFG_CONSOLE_IS_IN_ENV
+ If the board specific function
+ extern int overwrite_console (void);
+ returns 1, the stdin, stderr and stdout are switched to the
+ serial port, else the settings in the environment are used.
+
+- CFG_CONSOLE_OVERWRITE_ROUTINE
+ Enable the call to overwrite_console().
+
+- CFG_CONSOLE_ENV_OVERWRITE
+ Enable overwrite of previous console environment settings.
+
- CFG_MEMTEST_START, CFG_MEMTEST_END:
Begin and End addresses of the area used by the
simple memory test.
+- CFG_ALT_MEMTEST:
+ Enable an alternate, more extensive memory test.
+
- CFG_TFTP_LOADADDR:
Default load address for network file downloads
These two #defines specify the offset and size of the
environment area within the total memory of your EEPROM.
+ - CFG_I2C_EEPROM_ADDR:
+ If defined, specified the chip address of the EEPROM device.
+ The default address is zero.
+
+ - CFG_EEPROM_PAGE_WRITE_BITS:
+ If defined, the number of bits used to address bytes in a
+ single page in the EEPROM device. A 64 byte page, for example
+ would require six bits.
+
+ - CFG_EEPROM_PAGE_WRITE_DELAY_MS:
+ If defined, the number of milliseconds to delay between
+ page writes. The default is zero milliseconds.
+
+ - CFG_I2C_EEPROM_ADDR_LEN:
+ The length in bytes of the EEPROM memory array address. Note
+ that this is NOT the chip address length!
+
+ - CFG_EEPROM_SIZE:
+ The size in bytes of the EEPROM device.
+
- CFG_SPI_INIT_OFFSET
Defines offset to the initial SPI buffer area in DPRAM. The
don't have any device yet where we could complain.]
Note: once the monitor has been relocated, then it will complain if
-the default environment is used; a new CRC is computed as sson as you
+the default environment is used; a new CRC is computed as soon as you
use the "setenv" command to modify / delete / add any environment
variable [even when you try to delete a non-existing variable!].
FADS860T_config SXNI855T_config rsdproto_config
FPS850L_config Sandpoint8240_config sbc8260_config
GENIETV_config TQM823L_config PIP405_config
+ GEN860T_config
Note: for some board special configuration names may exist; check if
additional information is available from the board vendor; for
PPCBoot runs in system state and uses physical addresses, i.e. the
MMU is not used either for address mapping nor for memory protection.
-The available memory is mapped to fixed addresses usuing the memory
+The available memory is mapped to fixed addresses using the memory
controller. In this process, a contiguous block is formed for each
-memory type (Flash, SDRAM, SRAM), even when it consists out of
-several physical memory banks.
+memory type (Flash, SDRAM, SRAM), even when it consists of several
+physical memory banks.
PPCBoot is installed in the first 128 kB of the first Flash bank (on
TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
Info data; also, the exception vector code is copied to the low RAM
pages, and the final stack is set up.
-Only after this relocation you have a "normal" C environment; until
-that you are restricted in several ways, mostly because you are
+Only after this relocation will you have a "normal" C environment;
+until that you are restricted in several ways, mostly because you are
running from ROM, and because the code will have to be relocated to a
new address in RAM.
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
/* Read 256 bytes in EEPROM */
- i2c_read (0x54, 0, 1, buff, 256);
+ i2c_read (0x54, 0, 1, buff, 128);
+ i2c_read (0x54, 128, 1, buff+128, 128);
/* Retrieve MAC address in buffer (key EA) */
for (cp = buff;;) {
int clock_divisor = CFG_NS16550_CLK / 16 / baudrate;
#ifdef CFG_INIT_CHAN1
- (void)NS16550_init(0, clock_divisor);
+ (void)NS16550_init(COM_PORTS[0], clock_divisor);
#endif
#ifdef CFG_INIT_CHAN2
- (void)NS16550_init(1, clock_divisor);
+ (void)NS16550_init(COM_PORTS[1], clock_divisor);
#endif
}
LIB = lib$(BOARD).a
-OBJS = ccm.o flash.o fpga_ccm.o ../common/fpga.o
+OBJS = ccm.o flash.o fpga_ccm.o ../common/fpga.o \
+ ../../tqm8xx/load_sernum_ethaddr.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $^
/* ------------------------------------------------------------------------- */
static long int dram_size (long int, long int *, long int);
-#if 0
-static void puma_status (void);
-static void puma_set_mode (int mode);
-static int puma_init_done (void);
-static void puma_load (ulong addr, ulong len);
-#endif
void can_driver_enable (void);
void can_driver_disable (void);
return (1);
}
+/* ------------------------------------------------------------------------- */
/*
- * If Power-On-Reset switch off the red Fault LED:
+ * If Power-On-Reset switch off the Red and Green LED: At reset, the
+ * data direction registers are cleared and must therefore be restored.
*/
#define RSR_CSRS 0x08000000
return ((volatile immap_t *)CFG_IMMR)->im_clkrst.car_rsr & RSR_CSRS ? 0:1;
}
-#define FAULT_LED_PAR im_cpm.cp_pbpar
-#define FAULT_LED_DIR im_cpm.cp_pbdir
-#define FAULT_LED_ODR im_cpm.cp_pbodr
-#define FAULT_LED_DAT im_cpm.cp_pbdat
-#define FAULT_LED_BIT 0x20000 /* red LED is on PB.14 */
+#define PB_LED_GREEN 0x10000 /* red LED is on PB.15 */
+#define PB_LED_RED 0x20000 /* red LED is on PB.14 */
+#define PB_LEDS (PB_LED_GREEN | PB_LED_RED);
-static void switch_fault_led (void)
+static void init_leds (void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ immap->im_cpm.cp_pbpar &= ~PB_LEDS;
+ immap->im_cpm.cp_pbodr &= ~PB_LEDS;
+ immap->im_cpm.cp_pbdir |= PB_LEDS;
/* Check stop reset status */
if (power_on_reset()) {
- immap->FAULT_LED_PAR &= ~FAULT_LED_BIT;
- immap->FAULT_LED_ODR &= ~FAULT_LED_BIT;
- immap->FAULT_LED_DIR |= FAULT_LED_BIT;
- immap->FAULT_LED_DAT &= ~FAULT_LED_BIT;
+ immap->im_cpm.cp_pbdat &= ~PB_LEDS;
}
}
memctl->memc_mptpr = reg;
can_driver_enable ();
- switch_fault_led ();
+ init_leds ();
udelay(10000);
LIB = lib$(BOARD).a
-OBJS = scm.o flash.o fpga_scm.o ../common/fpga.o
+OBJS = scm.o flash.o fpga_scm.o ../common/fpga.o \
+ ../../tqm8xx/load_sernum_ethaddr.o
+
$(LIB): .depend $(OBJS)
$(AR) crv $@ $^
if (!power_on_reset() && fpga_control(fpga, FPGA_DONE_IS_HIGH)) {
old_id = fpga_control(fpga, FPGA_GET_ID);
- if (new_id <= old_id)
+ if (new_id == old_id)
do_load = 0;
}
immap->im_sit.sit_rtc = tim;
}
+#if 0
+ /* The code below is no longer valid since the prototype of
+ * eth_init() and eth_halt() have been changed to support
+ * multi-ethernet feature in PPCboot; the eth_initialize()
+ * routine should be called before any access to the ethernet
+ * callbacks.
+ */
+
/* FIXME - for now init ethernet to force PHY special mode */
eth_init(bd);
eth_halt();
+#endif
}
/* ------------------------------------------------------------------------- */
LIB = lib$(BOARD).a
-OBJS = $(BOARD).o flash.o
+OBJS = $(BOARD).o flash.o ../tqm8xx/load_sernum_ethaddr.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $^
return (psize);
}
-
-/*-----------------------------------------------------------------------
- * Process Hardware Information Block:
- *
- * If we boot on a system fresh from factory, check if the Hardware
- * Information Block exists and save the information it contains.
- *
- * The TQM8xxL / TQM82xx Hardware Information Block is defined as
- * follows:
- * - located in first flash bank
- * - starts at offset 0x0003FFC0
- * - size 0x00000040
- *
- * Internal structure:
- * - sequence of ASCII character strings
- * - fields separated by a single space character (0x20)
- * - last field terminated by NUL character (0x00)
- * - remaining space filled with NUL characters (0x00)
- *
- * Fields in Hardware Information Block:
- * 1) Module Type
- * 2) Serial Number
- * 3) First MAC Address
- * 4) Number of additional MAC addresses
- */
-
-void load_sernum_ethaddr (bd_t *bd)
-{
- unsigned char *hwi;
- unsigned char serial [CFG_HWINFO_SIZE];
- unsigned char ethaddr[CFG_HWINFO_SIZE];
- unsigned short ih, is, ie, part;
-
- hwi = (unsigned char *)(CFG_FLASH_BASE + CFG_HWINFO_OFFSET);
- ih = is = ie = 0;
-
- if (*((unsigned long *)hwi) != (unsigned long)CFG_HWINFO_MAGIC) {
- return;
- }
-
- part = 1;
-
- /* copy serial # / MAC address */
- while ((hwi[ih] != '\0') && (ih < CFG_HWINFO_SIZE)) {
- if (hwi[ih] < ' ' || hwi[ih] > '~') { /* ASCII strings! */
- return;
- }
- switch (part) {
- default: /* Copy serial # */
- if (hwi[ih] == ' ') {
- ++part;
- }
- serial[is++] = hwi[ih];
- break;
- case 3: /* Copy MAC address */
- if (hwi[ih] == ' ') {
- ++part;
- break;
- }
- ethaddr[ie++] = hwi[ih];
- if ((ie % 3) == 2)
- ethaddr[ie++] = ':';
- break;
- }
- ++ih;
- }
- serial[is] = '\0';
- if (ie && ethaddr[ie-1] == ':')
- --ie;
- ethaddr[ie] = '\0';
-
- /* set serial# and ethaddr if not yet defined */
- if (getenv("serial#") == NULL) {
- setenv ("serial#", serial);
- }
-
- if (getenv("ethaddr") == NULL) {
- setenv ("ethaddr", ethaddr);
- }
-}
-
/* ------------------------------------------------------------------------- */
LIB = lib$(BOARD).a
-OBJS = $(BOARD).o flash.o
+OBJS = $(BOARD).o flash.o load_sernum_ethaddr.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $^
--- /dev/null
+/*
+ * (C) Copyright 2000, 2001, 2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <ppcboot.h>
+#include "mpc8xx.h"
+
+/*-----------------------------------------------------------------------
+ * Process Hardware Information Block:
+ *
+ * If we boot on a system fresh from factory, check if the Hardware
+ * Information Block exists and save the information it contains.
+ *
+ * The TQM8xxL / TQM82xx Hardware Information Block is defined as
+ * follows:
+ * - located in first flash bank
+ * - starts at offset 0x0003FFC0
+ * - size 0x00000040
+ *
+ * Internal structure:
+ * - sequence of ASCII character strings
+ * - fields separated by a single space character (0x20)
+ * - last field terminated by NUL character (0x00)
+ * - remaining space filled with NUL characters (0x00)
+ *
+ * Fields in Hardware Information Block:
+ * 1) Module Type
+ * 2) Serial Number
+ * 3) First MAC Address
+ * 4) Number of additional MAC addresses
+ */
+
+void load_sernum_ethaddr (bd_t *bd)
+{
+ unsigned char *hwi;
+ unsigned char serial [CFG_HWINFO_SIZE];
+ unsigned char ethaddr[CFG_HWINFO_SIZE];
+ unsigned short ih, is, ie, part;
+
+ hwi = (unsigned char *)(CFG_FLASH_BASE + CFG_HWINFO_OFFSET);
+ ih = is = ie = 0;
+
+ if (*((unsigned long *)hwi) != (unsigned long)CFG_HWINFO_MAGIC) {
+ return;
+ }
+
+ part = 1;
+
+ /* copy serial # / MAC address */
+ while ((hwi[ih] != '\0') && (ih < CFG_HWINFO_SIZE)) {
+ if (hwi[ih] < ' ' || hwi[ih] > '~') { /* ASCII strings! */
+ return;
+ }
+ switch (part) {
+ default: /* Copy serial # */
+ if (hwi[ih] == ' ') {
+ ++part;
+ }
+ serial[is++] = hwi[ih];
+ break;
+ case 3: /* Copy MAC address */
+ if (hwi[ih] == ' ') {
+ ++part;
+ break;
+ }
+ ethaddr[ie++] = hwi[ih];
+ if ((ie % 3) == 2)
+ ethaddr[ie++] = ':';
+ break;
+ }
+ ++ih;
+ }
+ serial[is] = '\0';
+ if (ie && ethaddr[ie-1] == ':')
+ --ie;
+ ethaddr[ie] = '\0';
+
+ /* set serial# and ethaddr if not yet defined */
+ if (getenv("serial#") == NULL) {
+ setenv ("serial#", serial);
+ }
+
+ if (getenv("ethaddr") == NULL) {
+ setenv ("ethaddr", ethaddr);
+ }
+}
return (maxsize);
}
-
-/*-----------------------------------------------------------------------
- * Process Hardware Information Block:
- *
- * If we boot on a system fresh from factory, check if the Hardware
- * Information Block exists and save the information it contains.
- *
- * The TQM8xxL / TQM82xx Hardware Information Block is defined as
- * follows:
- * - located in first flash bank
- * - starts at offset 0x0003FFC0
- * - size 0x00000040
- *
- * Internal structure:
- * - sequence of ASCII character strings
- * - fields separated by a single space character (0x20)
- * - last field terminated by NUL character (0x00)
- * - remaining space filled with NUL characters (0x00)
- *
- * Fields in Hardware Information Block:
- * 1) Module Type
- * 2) Serial Number
- * 3) First MAC Address
- * 4) Number of additional MAC addresses
- */
-
-void load_sernum_ethaddr (bd_t *bd)
-{
- unsigned char *hwi;
- unsigned char serial [CFG_HWINFO_SIZE];
- unsigned char ethaddr[CFG_HWINFO_SIZE];
- unsigned short ih, is, ie, part;
-
- hwi = (unsigned char *)(CFG_FLASH_BASE + CFG_HWINFO_OFFSET);
- ih = is = ie = 0;
-
- if (*((unsigned long *)hwi) != (unsigned long)CFG_HWINFO_MAGIC) {
- return;
- }
-
- part = 1;
-
- /* copy serial # / MAC address */
- while ((hwi[ih] != '\0') && (ih < CFG_HWINFO_SIZE)) {
- if (hwi[ih] < ' ' || hwi[ih] > '~') { /* ASCII strings! */
- return;
- }
- switch (part) {
- default: /* Copy serial # */
- if (hwi[ih] == ' ') {
- ++part;
- }
- serial[is++] = hwi[ih];
- break;
- case 3: /* Copy MAC address */
- if (hwi[ih] == ' ') {
- ++part;
- break;
- }
- ethaddr[ie++] = hwi[ih];
- if ((ie % 3) == 2)
- ethaddr[ie++] = ':';
- break;
- }
- ++ih;
- }
- serial[is] = '\0';
- if (ie && ethaddr[ie-1] == ':')
- --ie;
- ethaddr[ie] = '\0';
-
- /* set serial# and ethaddr if not yet defined */
- if (getenv("serial#") == NULL) {
- setenv ("serial#", serial);
- }
-
- if (getenv("ethaddr") == NULL) {
- setenv ("ethaddr", ethaddr);
- }
-}
-
/* ------------------------------------------------------------------------- */
/* relocate environment function pointers etc. */
env_relocate (reloc_off);
-#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260)
+#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
+ defined(CONFIG_CCM) || defined(CONFIG_SCM)
load_sernum_ethaddr(bd);
#endif
/* IP Address */
#if defined(CFG_EEPROM_X40430)
- /* Maximum number of times to poll for acknowledge after write.
- */
+ /* Maximum number of times to poll for acknowledge after write */
#define MAX_ACKNOWLEDGE_POLLS 10
-
-#warning "x40430 modifications for the Grand Unifying I2C interface is untested"
#endif
/* ------------------------------------------------------------------------- */
* to 0x1ff.
*/
contr_r_addr[0] = 9;
- contr_r_addr[1] = addr[1];
+ contr_r_addr[1] = 0xff;
addr_void[0] = 0;
addr_void[1] = addr[1];
#ifdef CFG_I2C_EEPROM_ADDR
#ifdef CONFIG_ETH2ADDR
"eth2addr=" MK_STR(CONFIG_ETH2ADDR) "\0"
#endif
+#ifdef CONFIG_ETHPRIME
+ "ethprime=" CONFIG_ETHPRIME "\0"
+#endif
#ifdef CONFIG_IPADDR
"ipaddr=" MK_STR(CONFIG_IPADDR) "\0"
#endif
switch(k) {
/* this value is not documented anywhere */
- case 0x06000000 : mid = "P"; suf = "0"; break;
- default: suf = NULL; break;
+ case 0x06000000 : mid = "P"; suf = "0"; break;
+ case 0x06010001 : mid = "P"; suf = "A"; m = 1; break;
+ case 0x07000003 : mid = "P"; suf = "B"; m = 1; break;
+ default: suf = NULL; break;
}
if (suf)
*/
#include <ppcboot.h>
+#include <malloc.h>
#include <commproc.h>
#include <net.h>
#include <command.h>
static RTXBD *rtx = NULL;
+static int fec_send(struct eth_device* dev, volatile void *packet, int length);
+static int fec_recv(struct eth_device* dev);
+static int fec_init(struct eth_device* dev, bd_t * bd);
+static void fec_halt(struct eth_device* dev);
-int eth_send(volatile void *packet, int length)
+int fec_initialize(bd_t *bis)
+{
+ struct eth_device* dev;
+
+ dev = (struct eth_device*) malloc(sizeof *dev);
+
+ sprintf(dev->name, "FEC ETHERNET");
+ dev->iobase = 0;
+ dev->priv = 0;
+ dev->init = fec_init;
+ dev->halt = fec_halt;
+ dev->send = fec_send;
+ dev->recv = fec_recv;
+
+ eth_register(dev);
+
+ return 1;
+}
+
+static int fec_send(struct eth_device* dev, volatile void *packet, int length)
{
int j, rc;
volatile immap_t *immr = (immap_t *) CFG_IMMR;
return rc;
}
-int eth_rx(void)
+static int fec_recv(struct eth_device* dev)
{
int length;
volatile immap_t *immr = (immap_t *) CFG_IMMR;
#define FEC_RESET_DELAY 50
-int eth_init (bd_t * bd)
+static int fec_init(struct eth_device* dev, bd_t * bd)
{
int i;
/* Set station address
*/
-#define ea bd->bi_enetaddr
+#define ea eth_get_enetaddr()
fecp->fec_addr_low = (ea[0] << 24) | (ea[1] << 16) |
(ea[2] << 8) | (ea[3] ) ;
fecp->fec_addr_high = (ea[4] << 8) | (ea[5] ) ;
-void eth_halt(void)
+static void fec_halt(struct eth_device* dev)
{
#if 0
volatile immap_t *immr = (immap_t *)CFG_IMMR;
}
#endif /* (CONFIG_COMMANDS & CFG_CMD_MII) && !defined(CONFIG_BITBANGMII)*/
-#endif /* CFG_CMD_NET */
+#endif /* CFG_CMD_NET, FEC_ENET */
*/
#include <ppcboot.h>
+#include <malloc.h>
#include <commproc.h>
#include <net.h>
#include <command.h>
static RTXBD *rtx;
-int eth_send(volatile void *packet, int length)
+static int scc_send(struct eth_device* dev, volatile void *packet, int length);
+static int scc_recv(struct eth_device* dev);
+static int scc_init (struct eth_device* dev, bd_t * bd);
+static void scc_halt(struct eth_device* dev);
+
+int scc_initialize(bd_t *bis)
+{
+ struct eth_device* dev;
+
+ dev = (struct eth_device*) malloc(sizeof *dev);
+
+ sprintf(dev->name, "SCC ETHERNET");
+ dev->iobase = 0;
+ dev->priv = 0;
+ dev->init = scc_init;
+ dev->halt = scc_halt;
+ dev->send = scc_send;
+ dev->recv = scc_recv;
+
+ eth_register(dev);
+
+ return 1;
+}
+
+static int scc_send(struct eth_device* dev, volatile void *packet, int length)
{
int i, j=0;
#if 0
return i;
}
-int eth_rx(void)
+static int scc_recv(struct eth_device* dev)
{
int length;
*
*************************************************************/
-int eth_init(bd_t *bis)
+static int scc_init(struct eth_device* dev, bd_t *bis)
{
int i;
pram_ptr->sen_gaddr3 = 0x0; /* Group Address Filter 3 (unused) */
pram_ptr->sen_gaddr4 = 0x0; /* Group Address Filter 4 (unused) */
-#define ea bis->bi_enetaddr
+#define ea eth_get_enetaddr()
pram_ptr->sen_paddrh = (ea[5] << 8) + ea[4];
pram_ptr->sen_paddrm = (ea[3] << 8) + ea[2];
pram_ptr->sen_paddrl = (ea[1] << 8) + ea[0];
-void eth_halt(void)
+static void scc_halt(struct eth_device* dev)
{
volatile immap_t *immr = (immap_t *)CFG_IMMR;
immr->im_cpm.cp_scc[SCC_ENET].scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
#if (defined(CONFIG_TQM860L) || defined(CONFIG_TQM855L))
-# ifndef CONFIG_FEC_ENET /* use SCC for 10Mbps Ethernet */
+# ifdef CONFIG_SCC1_ENET /* use SCC for 10Mbps Ethernet */
/* Bits in parallel I/O port registers that have to be set/cleared
* to configure the pins for SCC1 use.
#define SICR_ENET_MASK ((uint)0x000000ff)
#define SICR_ENET_CLKRT ((uint)0x00000026)
-# else /* Use FEC for Fast Ethernet */
+# endif /* CONFIG_SCC1_ENET */
+
+# ifdef CONFIG_FEC_ENET /* Use FEC for Fast Ethernet */
-#undef SCC_ENET
#define FEC_ENET
#define PD_MII_TXD1 ((ushort)0x1000) /* PD 3 */
#define CFG_ENV_SIZE 2048
#endif
+/*-----------------------------------------------------------------------
+ * Hardware Information Block
+ */
+#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */
+#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */
+#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */
+
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CONFIG_BAUDRATE 9600
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#ifdef CONFIG_100MHz
+#define MPC8XX_FACT 24 /* Multiply by 24 */
+#define MPC8XX_XIN 4165000 /* 4.165 MHz in */
+#define CONFIG_8xx_GCLK_FREQ (MPC8XX_FACT * MPC8XX_XIN)
+ /* define if cant use get_gclk_freq */
+#else
#if 1 /* for 50MHz version of processor */
#define MPC8XX_FACT 12 /* Multiply by 12 */
-#define MPC8XX_XIN 4000000 /* 4 MHz in */
+#define MPC8XX_XIN 4000000 /* 4 MHz in */
#define CONFIG_8xx_GCLK_FREQ 48000000 /* define if cant use get_gclk_freq */
#else /* for 80MHz version of processor */
#define MPC8XX_FACT 20 /* Multiply by 20 */
-#define MPC8XX_XIN 4000000 /* 4 MHz in */
+#define MPC8XX_XIN 4000000 /* 4 MHz in */
#define CONFIG_8xx_GCLK_FREQ 80000000 /* define if cant use get_gclk_freq */
#endif
+#endif
#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
* Set clock output, timebase and RTC source and divider,
* power management and some other internal clocks
*/
+#ifdef CONFIG_100MHz /* for 100 MHz, external bus is half CPU clock */
+#define SCCR_MASK 0
+#define CFG_SCCR (SCCR_TBS | SCCR_COM00 | SCCR_DFSYNC00 | \
+ SCCR_DFBRG00 | SCCR_DFNL000 | SCCR_DFNH000 | \
+ SCCR_DFLCD000 |SCCR_DFALCD00 | SCCR_EBDF01)
+#else /* up to 50 MHz we use a 1:1 clock */
#define SCCR_MASK SCCR_EBDF11
#define CFG_SCCR (SCCR_TBS | SCCR_COM00 | SCCR_DFSYNC00 | \
SCCR_DFBRG00 | SCCR_DFNL000 | SCCR_DFNH000 | \
SCCR_DFLCD000 |SCCR_DFALCD00 )
+#endif /* CONFIG_100MHz */
/*-----------------------------------------------------------------------
* RCCR - RISC Controller Configuration Register 19-4
#define BOOTFLAG_WARM 0x02 /* Software reboot */
+/*-----------------------------------------------------------------------
+ * Hardware Information Block
+ */
+#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */
+#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */
+#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */
+
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SCC1_ENET
+
#endif /* __CONFIG_H */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-/*
- * Sanity checks
- */
-#if defined(CONFIG_SCC1_ENET) && defined(CONFIG_FEC_ENET)
-#error Both CONFIG_SCC1_ENET and CONFIG_FEC_ENET configured
-#endif
+#define CONFIG_SCC1_ENET
+#define CONFIG_FEC_ENET
+
+#define CONFIG_ETHADDR 00:01:02:C9:1D:12
+#define CONFIG_ETH1ADDR 00:E0:29:09:85:4A
+#define CONFIG_ETHPRIME "SCC ETHERNET"
+#define CONFIG_IPADDR 192.168.3.66
+#define CONFIG_SERVERIP 192.168.3.1
#endif /* __CONFIG_H */
#ifndef __NET_H__
#define __NET_H__
+#if !defined(CONFIG_NET_MULTI) && defined(CONFIG_8xx)
+#include <commproc.h>
+#if defined(FEC_ENET) || defined(SCC_ENET)
+#define CONFIG_NET_MULTI
+#endif
+#endif
+
/*
* The number of receive packet buffers, and the required packet buffer
#if defined(CONFIG_CANBT) || \
defined(CONFIG_CCM) || \
+ defined(CONFIG_SCM) || \
defined(CONFIG_CPCI405) || \
defined(CONFIG_CPCIISER4) || \
defined(CONFIG_DU405) || \
#endif
#if defined(CONFIG_NX823) || \
+ defined(CONFIG_CCM) || \
+ defined(CONFIG_SCM) || \
defined(CONFIG_TQM8xxL) || \
defined(CONFIG_TQM8260)
void load_sernum_ethaddr(bd_t *bd);
#include <command.h>
#include "net.h"
+#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
+
#ifdef CFG_GT_6426x
extern int gt6426x_eth_initialize(bd_t *bis);
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
-
extern int eepro100_initialize(bd_t*);
extern int dc21x4x_initialize(bd_t*);
+extern int fec_initialize(bd_t*);
+extern int scc_initialize(bd_t*);
static struct eth_device *eth_devices, *eth_current;
#ifdef CFG_GT_6426x
gt6426x_eth_initialize(bis);
#endif
+#ifdef FEC_ENET
+ fec_initialize(bis);
+#endif
+#ifdef SCC_ENET
+ scc_initialize(bis);
+#endif
if (!eth_devices)
printf("No ethernet found.\n");
else {
struct eth_device *dev = eth_devices;
+ char *ethprime = getenv ("ethprime");
do {
if (eth_number)
printf("%s", dev->name);
+ if (ethprime &&
+ strcmp (dev->name, ethprime) == 0)
+ {
+ eth_current = dev;
+ printf(" [PRIME]");
+ }
+
sprintf(enetvar, eth_number ? "eth%daddr" : "ethaddr", eth_number);
tmp = getenv (enetvar);
projects / users / rw / ppcboot.git / commitdiff