accel/habanalabs: unsecure TSB_CFG_MTRR regs

In order to utilize Engine Barrier padding, user must have access to
this register set.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>

diff --git a/drivers/accel/habanalabs/gaudi2/gaudi2_security.c b/drivers/accel/habanalabs/gaudi2/gaudi2_security.c
index fadb870ff4c031f125f23a90ef640b8952e4df7e..2742b1f801eb2a599bd08741b64267bb5d9a756d 100644 (file)
--- a/drivers/accel/habanalabs/gaudi2/gaudi2_security.c
+++ b/drivers/accel/habanalabs/gaudi2/gaudi2_security.c
@@ -1534,6 +1534,10 @@ static const u32 gaudi2_pb_dcr0_tpc0_unsecured_regs[] = {
        mmDCORE0_TPC0_CFG_QM_KERNEL_CONFIG,
        mmDCORE0_TPC0_CFG_QM_KERNEL_ID,
        mmDCORE0_TPC0_CFG_QM_POWER_LOOP,
+       mmDCORE0_TPC0_CFG_TSB_CFG_MTRR_2_0,
+       mmDCORE0_TPC0_CFG_TSB_CFG_MTRR_2_1,
+       mmDCORE0_TPC0_CFG_TSB_CFG_MTRR_2_2,
+       mmDCORE0_TPC0_CFG_TSB_CFG_MTRR_2_3,
        mmDCORE0_TPC0_CFG_LUT_FUNC32_BASE2_ADDR_LO,
        mmDCORE0_TPC0_CFG_LUT_FUNC32_BASE2_ADDR_HI,
        mmDCORE0_TPC0_CFG_LUT_FUNC64_BASE2_ADDR_LO,