scsi: mpi3mr: Update consumer index of reply queues after every 100 replies

Instead of updating the ConsumerIndex of the Admin and Operational
ReplyQueues after processing all replies in the queue, the index will now
be periodically updated after processing every 100 replies.

Co-developed-by: Sathya Prakash <sathya.prakash@broadcom.com>
Signed-off-by: Sathya Prakash <sathya.prakash@broadcom.com>
Signed-off-by: Ranjan Kumar <ranjan.kumar@broadcom.com>
Link: https://lore.kernel.org/r/20240808125418.8832-3-ranjan.kumar@broadcom.com
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/scsi/mpi3mr/mpi3mr.h b/drivers/scsi/mpi3mr/mpi3mr.h
index dc2cdd5f031114675077e5a12783742b2fe57478..cbb6e4b2d44729084522eed704cd3a6a361d03bb 100644 (file)
--- a/drivers/scsi/mpi3mr/mpi3mr.h
+++ b/drivers/scsi/mpi3mr/mpi3mr.h
@@ -213,6 +213,7 @@ extern atomic64_t event_counter;
 #define MPI3MR_HDB_QUERY_ELEMENT_TRIGGER_FORMAT_INDEX   0
 #define MPI3MR_HDB_QUERY_ELEMENT_TRIGGER_FORMAT_DATA    1
 
+#define MPI3MR_THRESHOLD_REPLY_COUNT   100
 
 /* SGE Flag definition */
 #define MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST \

diff --git a/drivers/scsi/mpi3mr/mpi3mr_fw.c b/drivers/scsi/mpi3mr/mpi3mr_fw.c
index 169850393580b6a2335234257f7fd83a0ab078bc..6eb5bcd8e757090b5fc6285f3e8d7796b55b2d95 100644 (file)
--- a/drivers/scsi/mpi3mr/mpi3mr_fw.c
+++ b/drivers/scsi/mpi3mr/mpi3mr_fw.c
@@ -443,6 +443,7 @@ int mpi3mr_process_admin_reply_q(struct mpi3mr_ioc *mrioc)
        u32 admin_reply_ci = mrioc->admin_reply_ci;
        u32 num_admin_replies = 0;
        u64 reply_dma = 0;
+       u16 threshold_comps = 0;
        struct mpi3_default_reply_descriptor *reply_desc;
 
        if (!atomic_add_unless(&mrioc->admin_reply_q_in_use, 1, 1))
@@ -466,6 +467,7 @@ int mpi3mr_process_admin_reply_q(struct mpi3mr_ioc *mrioc)
                if (reply_dma)
                        mpi3mr_repost_reply_buf(mrioc, reply_dma);
                num_admin_replies++;
+               threshold_comps++;
                if (++admin_reply_ci == mrioc->num_admin_replies) {
                        admin_reply_ci = 0;
                        exp_phase ^= 1;
@@ -476,6 +478,11 @@ int mpi3mr_process_admin_reply_q(struct mpi3mr_ioc *mrioc)
                if ((le16_to_cpu(reply_desc->reply_flags) &
                    MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK) != exp_phase)
                        break;
+               if (threshold_comps == MPI3MR_THRESHOLD_REPLY_COUNT) {
+                       writel(admin_reply_ci,
+                           &mrioc->sysif_regs->admin_reply_queue_ci);
+                       threshold_comps = 0;
+               }
        } while (1);
 
        writel(admin_reply_ci, &mrioc->sysif_regs->admin_reply_queue_ci);
@@ -529,7 +536,7 @@ int mpi3mr_process_op_reply_q(struct mpi3mr_ioc *mrioc,
        u32 num_op_reply = 0;
        u64 reply_dma = 0;
        struct mpi3_default_reply_descriptor *reply_desc;
-       u16 req_q_idx = 0, reply_qidx;
+       u16 req_q_idx = 0, reply_qidx, threshold_comps = 0;
 
        reply_qidx = op_reply_q->qid - 1;
 
@@ -560,6 +567,7 @@ int mpi3mr_process_op_reply_q(struct mpi3mr_ioc *mrioc,
                if (reply_dma)
                        mpi3mr_repost_reply_buf(mrioc, reply_dma);
                num_op_reply++;
+               threshold_comps++;
 
                if (++reply_ci == op_reply_q->num_replies) {
                        reply_ci = 0;
@@ -581,13 +589,19 @@ int mpi3mr_process_op_reply_q(struct mpi3mr_ioc *mrioc,
                        break;
                }
 #endif
+               if (threshold_comps == MPI3MR_THRESHOLD_REPLY_COUNT) {
+                       writel(reply_ci,
+                           &mrioc->sysif_regs->oper_queue_indexes[reply_qidx].consumer_index);
+                       atomic_sub(threshold_comps, &op_reply_q->pend_ios);
+                       threshold_comps = 0;
+               }
        } while (1);
 
        writel(reply_ci,
            &mrioc->sysif_regs->oper_queue_indexes[reply_qidx].consumer_index);
        op_reply_q->ci = reply_ci;
        op_reply_q->ephase = exp_phase;
-
+       atomic_sub(threshold_comps, &op_reply_q->pend_ios);
        atomic_dec(&op_reply_q->in_use);
        return num_op_reply;
 }