return lpa;
 
                        /* If both registers are equal, it is suspect but not
-                       * impossible, hence a new try
-                       */
+                        * impossible, hence a new try
+                        */
                } while (lpa == adv && retry--);
 
                mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa);
 
                return ret;
 
        /* Clear the interrupt status bit by writing a “1”
-        * to the corresponding bit in INT_CLEAR (2:0 are reserved) */
+        * to the corresponding bit in INT_CLEAR (2:0 are reserved)
+        */
        ret = phy_write(phydev, DP83865_INT_CLEAR, ret & ~0x7);
 
        return ret;
 {
        ns_giga_speed_fallback(phydev, ALL_FALLBACK_ON);
        /* In the latest MAC or switches design, the 10 Mbps loopback
-          is desired to be turned off. */
+        * is desired to be turned off.
+        */
        ns_10_base_t_hdx_loopack(phydev, hdx_loopback_off);
        return ns_ack_interrupt(phydev);
 }
 
 
 /* A mapping of all SUPPORTED settings to speed/duplex.  This table
  * must be grouped by speed and sorted in descending match priority
- * - iow, descending speed. */
+ * - iow, descending speed.
+ */
 
 #define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
                               .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
 
                        pl->link_config.duplex = DUPLEX_FULL;
 
                /* We treat the "pause" and "asym-pause" terminology as
-                * defining the link partner's ability. */
+                * defining the link partner's ability.
+                */
                if (fwnode_property_read_bool(fixed_node, "pause"))
                        __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
                                  pl->link_config.lp_advertising);
                        phylink_mac_pcs_get_state(pl, &link_state);
 
                        /* If we have a phy, the "up" state is the union of
-                        * both the PHY and the MAC */
+                        * both the PHY and the MAC
+                        */
                        if (pl->phydev)
                                link_state.link &= pl->phy_state.link;
 
                                link_state.interface = pl->phy_state.interface;
 
                                /* If we have a PHY, we need to update with
-                                * the PHY flow control bits. */
+                                * the PHY flow control bits.
+                                */
                                link_state.pause = pl->phy_state.pause;
                                mac_config = true;
                        }
 
 
 /* This adds a skew for both TX and RX clocks, so the skew should only be
  * applied to "rgmii-id" interfaces. It may not work as expected
- * on "rgmii-txid", "rgmii-rxid" or "rgmii" interfaces. */
+ * on "rgmii-txid", "rgmii-rxid" or "rgmii" interfaces.
+ */
 static int vsc8601_add_skew(struct phy_device *phydev)
 {
        int ret;