static int b43_phy_ht_op_init(struct b43_wldev *dev)
 {
+       u16 tmp;
+
        b43_phy_ht_tables_init(dev);
 
        /* TODO: PHY ops on regs 0x0be, 0x23f 0x240 0x241 */
 
        b43_phy_write(dev, 0x0b9, 0x0072);
 
+       /* TODO: Some ops here */
+
+       /* Copy some tables entries */
+       tmp = b43_httab_read(dev, B43_HTTAB16(7, 0x144));
+       b43_httab_write(dev, B43_HTTAB16(7, 0x14a), tmp);
+       tmp = b43_httab_read(dev, B43_HTTAB16(7, 0x154));
+       b43_httab_write(dev, B43_HTTAB16(7, 0x15a), tmp);
+       tmp = b43_httab_read(dev, B43_HTTAB16(7, 0x164));
+       b43_httab_write(dev, B43_HTTAB16(7, 0x16a), tmp);
+
+       /* Reset CCA */
+       b43_phy_force_clock(dev, true);
+       tmp = b43_phy_read(dev, B43_PHY_HT_BBCFG);
+       b43_phy_write(dev, B43_PHY_HT_BBCFG, tmp | B43_PHY_HT_BBCFG_RSTCCA);
+       b43_phy_write(dev, B43_PHY_HT_BBCFG, tmp & ~B43_PHY_HT_BBCFG_RSTCCA);
+       b43_phy_force_clock(dev, false);
+
+       b43_mac_phy_clock_set(dev, true);
+
        return 0;
 }
 
 
 #include "phy_common.h"
 
 
+#define B43_PHY_HT_BBCFG                       0x001 /* BB config */
+#define  B43_PHY_HT_BBCFG_RSTCCA               0x4000 /* Reset CCA */
+#define  B43_PHY_HT_BBCFG_RSTRX                        0x8000 /* Reset RX */
 #define B43_PHY_HT_BANDCTL                     0x009 /* Band control */
+#define  B43_PHY_HT_BANDCTL_5GHZ               0x0001 /* Use the 5GHz band */
 #define B43_PHY_HT_TABLE_ADDR                  0x072 /* Table address */
 #define B43_PHY_HT_TABLE_DATALO                        0x073 /* Table data low */
 #define B43_PHY_HT_TABLE_DATAHI                        0x074 /* Table data high */