sdhci_sparx5 = sdhci_pltfm_priv(pltfm_host);
        sdhci_sparx5->host = host;
 
-       pltfm_host->clk = devm_clk_get(&pdev->dev, "core");
+       pltfm_host->clk = devm_clk_get_enabled(&pdev->dev, "core");
        if (IS_ERR(pltfm_host->clk)) {
                ret = PTR_ERR(pltfm_host->clk);
-               dev_err(&pdev->dev, "failed to get core clk: %d\n", ret);
+               dev_err(&pdev->dev, "failed to get and enable core clk: %d\n", ret);
                goto free_pltfm;
        }
-       ret = clk_prepare_enable(pltfm_host->clk);
-       if (ret)
-               goto free_pltfm;
 
        if (!of_property_read_u32(np, "microchip,clock-delay", &value) &&
            (value > 0 && value <= MSHC_DLY_CC_MAX))
 
        ret = mmc_of_parse(host->mmc);
        if (ret)
-               goto err_clk;
+               goto free_pltfm;
 
        sdhci_sparx5->cpu_ctrl = syscon_regmap_lookup_by_compatible(syscon);
        if (IS_ERR(sdhci_sparx5->cpu_ctrl)) {
                dev_err(&pdev->dev, "No CPU syscon regmap !\n");
                ret = PTR_ERR(sdhci_sparx5->cpu_ctrl);
-               goto err_clk;
+               goto free_pltfm;
        }
 
        if (sdhci_sparx5->delay_clock >= 0)
 
        ret = sdhci_add_host(host);
        if (ret)
-               goto err_clk;
+               goto free_pltfm;
 
        /* Set AXI bus master to use un-cached access (for DMA) */
        if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA) &&
 
        return ret;
 
-err_clk:
-       clk_disable_unprepare(pltfm_host->clk);
 free_pltfm:
        sdhci_pltfm_free(pdev);
        return ret;
                .pm = &sdhci_pltfm_pmops,
        },
        .probe = sdhci_sparx5_probe,
-       .remove_new = sdhci_pltfm_unregister,
+       .remove_new = sdhci_pltfm_remove,
 };
 
 module_platform_driver(sdhci_sparx5_driver);