spi: nxp-fspi: reset the FLSHxCR1 registers

Reset the FLSHxCR1 registers to default value. ROM may set the register
value and it affects the SPI NAND normal functions.

Signed-off-by: Han Xu <han.xu@nxp.com>
Link: https://lore.kernel.org/r/20230906183254.235847-1-han.xu@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 45a4acc956610a911674f811e2d7bf53492fd7a2..c964f41dcc428c100c1b3e4c56912e0eed379f7a 100644 (file)
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -1084,6 +1084,13 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
        fspi_writel(f, FSPI_AHBCR_PREF_EN | FSPI_AHBCR_RDADDROPT,
                 base + FSPI_AHBCR);
 
+       /* Reset the FLSHxCR1 registers. */
+       reg = FSPI_FLSHXCR1_TCSH(0x3) | FSPI_FLSHXCR1_TCSS(0x3);
+       fspi_writel(f, reg, base + FSPI_FLSHA1CR1);
+       fspi_writel(f, reg, base + FSPI_FLSHA2CR1);
+       fspi_writel(f, reg, base + FSPI_FLSHB1CR1);
+       fspi_writel(f, reg, base + FSPI_FLSHB2CR1);
+
        /* AHB Read - Set lut sequence ID for all CS. */
        fspi_writel(f, SEQID_LUT, base + FSPI_FLSHA1CR2);
        fspi_writel(f, SEQID_LUT, base + FSPI_FLSHA2CR2);