arm64: dts: qcom: ipq5332-rdp441: Enable PCIe phys and controllers

Enable the PCIe controller and PHY nodes for RDP 441.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250317100029.881286-5-quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
index 846413817e9ad0c9f34856530e86e4e47c9315e6..79ec77cfe552786f3d673a020766c3a6a566e81d 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
@@ -32,6 +32,34 @@
        status = "okay";
 };
 
+&pcie0 {
+       pinctrl-0 = <&pcie0_default>;
+       pinctrl-names = "default";
+
+       perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
+
+       status = "okay";
+};
+
+&pcie0_phy {
+       status = "okay";
+};
+
+&pcie1 {
+       pinctrl-0 = <&pcie1_default>;
+       pinctrl-names = "default";
+
+       perst-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
+
+       status = "okay";
+};
+
+&pcie1_phy {
+       status = "okay";
+};
+
 &tlmm {
        i2c_1_pins: i2c-1-state {
                pins = "gpio29", "gpio30";
@@ -40,6 +68,54 @@
                bias-pull-up;
        };
 
+       pcie0_default: pcie0-default-state {
+               clkreq-n-pins {
+                       pins = "gpio37";
+                       function = "pcie0_clk";
+                       drive-strength = <8>;
+                       bias-pull-up;
+               };
+
+               perst-n-pins {
+                       pins = "gpio38";
+                       function = "gpio";
+                       drive-strength = <8>;
+                       bias-pull-up;
+                       output-low;
+               };
+
+               wake-n-pins {
+                       pins = "gpio39";
+                       function = "pcie0_wake";
+                       drive-strength = <8>;
+                       bias-pull-up;
+               };
+       };
+
+       pcie1_default: pcie1-default-state {
+               clkreq-n-pins {
+                       pins = "gpio46";
+                       function = "pcie1_clk";
+                       drive-strength = <8>;
+                       bias-pull-up;
+               };
+
+               perst-n-pins {
+                       pins = "gpio47";
+                       function = "gpio";
+                       drive-strength = <8>;
+                       bias-pull-up;
+                       output-low;
+               };
+
+               wake-n-pins {
+                       pins = "gpio48";
+                       function = "pcie1_wake";
+                       drive-strength = <8>;
+                       bias-pull-up;
+               };
+       };
+
        sdc_default_state: sdc-default-state {
                clk-pins {
                        pins = "gpio13";