if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
                return;
 
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_RXF)) {
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_RXF)) {
                /* Pull RXF1 */
                iwl_fwrt_dump_rxf(fwrt, dump_data,
                                  cfg->lmac[0].rxfifo1_size, 0, 0);
                                          LMAC2_PRPH_OFFSET, 2);
        }
 
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_TXF)) {
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_TXF)) {
                /* Pull TXF data from LMAC1 */
                for (i = 0; i < fwrt->smem_cfg.num_txfifo_entries; i++) {
                        /* Mark the number of TXF we're pulling now */
                }
        }
 
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_INTERNAL_TXF) &&
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_INTERNAL_TXF) &&
            fw_has_capa(&fwrt->fw->ucode_capa,
                        IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
                /* Pull UMAC internal TXF data from all TXFs */
                            u32 sram_len, u32 sram_ofs, u32 smem_len,
                            u32 sram2_len)
 {
-       const struct iwl_fw_dbg_mem_seg_tlv *fw_dbg_mem = fwrt->fw->dbg_mem_tlv;
+       const struct iwl_fw_dbg_mem_seg_tlv *fw_dbg_mem = fwrt->fw->dbg.mem_tlv;
        struct iwl_fw_error_dump_mem *dump_mem;
        int i;
 
-       if (!fwrt->fw->n_dbg_mem_tlv) {
+       if (!fwrt->fw->dbg.n_mem_tlv) {
                (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
                (*dump_data)->len = cpu_to_le32(sram_len + sizeof(*dump_mem));
                dump_mem = (void *)(*dump_data)->data;
                *dump_data = iwl_fw_error_next_data(*dump_data);
        }
 
-       for (i = 0; i < fwrt->fw->n_dbg_mem_tlv; i++) {
+       for (i = 0; i < fwrt->fw->dbg.n_mem_tlv; i++) {
                u32 len = le32_to_cpu(fw_dbg_mem[i].len);
                u32 ofs = le32_to_cpu(fw_dbg_mem[i].ofs);
 
        struct iwl_fw_dump_ptrs *fw_error_dump;
        struct scatterlist *sg_dump_data;
        u32 sram_len, sram_ofs;
-       const struct iwl_fw_dbg_mem_seg_tlv *fw_dbg_mem = fwrt->fw->dbg_mem_tlv;
+       const struct iwl_fw_dbg_mem_seg_tlv *fw_dbg_mem = fwrt->fw->dbg.mem_tlv;
        struct iwl_fwrt_shared_mem_cfg *mem_cfg = &fwrt->smem_cfg;
        u32 file_len, fifo_data_len = 0, prph_len = 0, radio_len = 0;
-       u32 smem_len = fwrt->fw->n_dbg_mem_tlv ? 0 : fwrt->trans->cfg->smem_len;
-       u32 sram2_len = fwrt->fw->n_dbg_mem_tlv ?
+       u32 smem_len = fwrt->fw->dbg.n_mem_tlv ? 0 : fwrt->trans->cfg->smem_len;
+       u32 sram2_len = fwrt->fw->dbg.n_mem_tlv ?
                                0 : fwrt->trans->cfg->dccm2_len;
        bool monitor_dump_only = false;
        int i;
        if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status)) {
                fifo_data_len = 0;
 
-               if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_RXF)) {
+               if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_RXF)) {
 
                        /* Count RXF2 size */
                        if (mem_cfg->rxfifo2_size) {
                        }
                }
 
-               if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_TXF)) {
+               if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_TXF)) {
                        size_t fifo_const_len = sizeof(*dump_data) +
                                sizeof(struct iwl_fw_error_dump_fifo);
 
                        }
                }
 
-               if ((fwrt->fw->dbg_dump_mask &
+               if ((fwrt->fw->dbg.dump_mask &
                    BIT(IWL_FW_ERROR_DUMP_INTERNAL_TXF)) &&
                    fw_has_capa(&fwrt->fw->ucode_capa,
                                IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
 
                /* Make room for PRPH registers */
                if (!fwrt->trans->cfg->gen2 &&
-                   fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_PRPH))
+                   fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_PRPH))
                        prph_len += iwl_fw_get_prph_len(fwrt);
 
                if (fwrt->trans->cfg->device_family == IWL_DEVICE_FAMILY_7000 &&
-                   fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_RADIO_REG))
+                   fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_RADIO_REG))
                        radio_len = sizeof(*dump_data) + RADIO_REG_MAX_READ;
        }
 
                   prph_len +
                   radio_len;
 
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_DEV_FW_INFO))
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_DEV_FW_INFO))
                file_len += sizeof(*dump_data) + sizeof(*dump_info);
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM_CFG))
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM_CFG))
                file_len += sizeof(*dump_data) + sizeof(*dump_smem_cfg);
 
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM)) {
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM)) {
                /* Make room for the SMEM, if it exists */
                if (smem_len)
                        file_len += sizeof(*dump_data) + smem_len +
                                sizeof(struct iwl_fw_error_dump_mem);
 
                /* Make room for MEM segments */
-               for (i = 0; i < fwrt->fw->n_dbg_mem_tlv; i++) {
+               for (i = 0; i < fwrt->fw->dbg.n_mem_tlv; i++) {
                        file_len += sizeof(*dump_data) +
                                le32_to_cpu(fw_dbg_mem[i].len) +
                                sizeof(struct iwl_fw_error_dump_mem);
        }
 
        /* Make room for fw's virtual image pages, if it exists */
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_PAGING) &&
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_PAGING) &&
            !fwrt->trans->cfg->gen2 &&
            fwrt->fw->img[fwrt->cur_fw_img].paging_mem_size &&
            fwrt->fw_paging_db[0].fw_paging_block)
                           sizeof(*dump_info) + sizeof(*dump_smem_cfg);
        }
 
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_ERROR_INFO) &&
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_ERROR_INFO) &&
            fwrt->dump.desc)
                file_len += sizeof(*dump_data) + sizeof(*dump_trig) +
                            fwrt->dump.desc->len;
 
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM) &&
-           !fwrt->fw->n_dbg_mem_tlv)
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM) &&
+           !fwrt->fw->dbg.n_mem_tlv)
                file_len += sizeof(*dump_data) + sram_len +
                        sizeof(struct iwl_fw_error_dump_mem);
 
        dump_file->barker = cpu_to_le32(IWL_FW_ERROR_DUMP_BARKER);
        dump_data = (void *)dump_file->data;
 
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_DEV_FW_INFO)) {
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_DEV_FW_INFO)) {
                dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_DEV_FW_INFO);
                dump_data->len = cpu_to_le32(sizeof(*dump_info));
                dump_info = (void *)dump_data->data;
                dump_data = iwl_fw_error_next_data(dump_data);
        }
 
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM_CFG)) {
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM_CFG)) {
                /* Dump shared memory configuration */
                dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_CFG);
                dump_data->len = cpu_to_le32(sizeof(*dump_smem_cfg));
                        iwl_read_radio_regs(fwrt, &dump_data);
        }
 
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_ERROR_INFO) &&
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_ERROR_INFO) &&
            fwrt->dump.desc) {
                dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_ERROR_INFO);
                dump_data->len = cpu_to_le32(sizeof(*dump_trig) +
        if (monitor_dump_only)
                goto dump_trans_data;
 
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM))
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_MEM))
                iwl_fw_dump_mem(fwrt, &dump_data, sram_len, sram_ofs, smem_len,
                                sram2_len);
 
        }
 
        /* Dump fw's virtual image */
-       if (fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_PAGING) &&
+       if (fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_PAGING) &&
            !fwrt->trans->cfg->gen2 &&
            fwrt->fw->img[fwrt->cur_fw_img].paging_mem_size &&
            fwrt->fw_paging_db[0].fw_paging_block) {
        int ret;
        int i;
 
-       if (WARN_ONCE(conf_id >= ARRAY_SIZE(fwrt->fw->dbg_conf_tlv),
+       if (WARN_ONCE(conf_id >= ARRAY_SIZE(fwrt->fw->dbg.conf_tlv),
                      "Invalid configuration %d\n", conf_id))
                return -EINVAL;
 
        /* EARLY START - firmware's configuration is hard coded */
-       if ((!fwrt->fw->dbg_conf_tlv[conf_id] ||
-            !fwrt->fw->dbg_conf_tlv[conf_id]->num_of_hcmds) &&
+       if ((!fwrt->fw->dbg.conf_tlv[conf_id] ||
+            !fwrt->fw->dbg.conf_tlv[conf_id]->num_of_hcmds) &&
            conf_id == FW_DBG_START_FROM_ALIVE)
                return 0;
 
-       if (!fwrt->fw->dbg_conf_tlv[conf_id])
+       if (!fwrt->fw->dbg.conf_tlv[conf_id])
                return -EINVAL;
 
        if (fwrt->dump.conf != FW_DBG_INVALID)
                         fwrt->dump.conf);
 
        /* Send all HCMDs for configuring the FW debug */
-       ptr = (void *)&fwrt->fw->dbg_conf_tlv[conf_id]->hcmd;
-       for (i = 0; i < fwrt->fw->dbg_conf_tlv[conf_id]->num_of_hcmds; i++) {
+       ptr = (void *)&fwrt->fw->dbg.conf_tlv[conf_id]->hcmd;
+       for (i = 0; i < fwrt->fw->dbg.conf_tlv[conf_id]->num_of_hcmds; i++) {
                struct iwl_fw_dbg_conf_hcmd *cmd = (void *)ptr;
                struct iwl_host_cmd hcmd = {
                        .id = cmd->id,
 
        /* start recording again if the firmware is not crashed */
        if (!test_bit(STATUS_FW_ERROR, &fwrt->trans->status) &&
-           fwrt->fw->dbg_dest_tlv) {
+           fwrt->fw->dbg.dest_tlv) {
                /* wait before we collect the data till the DBGC stop */
                udelay(500);
                iwl_fw_dbg_restart_recording(fwrt, ¶ms);
 
 int iwl_fw_start_dbg_conf(struct iwl_fw_runtime *fwrt, u8 id);
 
 #define iwl_fw_dbg_trigger_enabled(fw, id) ({                  \
-       void *__dbg_trigger = (fw)->dbg_trigger_tlv[(id)];      \
+       void *__dbg_trigger = (fw)->dbg.trigger_tlv[(id)];      \
        unlikely(__dbg_trigger);                                \
 })
 
 static inline struct iwl_fw_dbg_trigger_tlv*
 _iwl_fw_dbg_get_trigger(const struct iwl_fw *fw, enum iwl_fw_dbg_trigger id)
 {
-       return fw->dbg_trigger_tlv[id];
+       return fw->dbg.trigger_tlv[id];
 }
 
 #define iwl_fw_dbg_get_trigger(fw, id) ({                      \
        return fw_has_capa(&fwrt->fw->ucode_capa,
                           IWL_UCODE_TLV_CAPA_D3_DEBUG) &&
                fwrt->trans->cfg->d3_debug_data_length &&
-               fwrt->fw->dbg_dump_mask & BIT(IWL_FW_ERROR_DUMP_D3_DEBUG_DATA);
+               fwrt->fw->dbg.dump_mask & BIT(IWL_FW_ERROR_DUMP_D3_DEBUG_DATA);
 }
 
 void iwl_fw_dbg_read_d3_debug_data(struct iwl_fw_runtime *fwrt);
 
        IWL_FW_MVM,
 };
 
+/**
+ * struct iwl_fw_dbg - debug data
+ *
+ * @dest_tlv: points to debug destination TLV (typically SRAM or DRAM)
+ * @n_dest_reg: num of reg_ops in dest_tlv
+ * @conf_tlv: array of pointers to configuration HCMDs
+ * @trigger_tlv: array of pointers to triggers TLVs
+ * @trigger_tlv_len: lengths of the @dbg_trigger_tlv entries
+ * @mem_tlv: Runtime addresses to dump
+ * @n_mem_tlv: number of runtime addresses
+ * @dump_mask: bitmask of dump regions
+*/
+struct iwl_fw_dbg {
+       struct iwl_fw_dbg_dest_tlv_v1 *dest_tlv;
+       u8 n_dest_reg;
+       struct iwl_fw_dbg_conf_tlv *conf_tlv[FW_DBG_CONF_MAX];
+       struct iwl_fw_dbg_trigger_tlv *trigger_tlv[FW_DBG_TRIGGER_MAX];
+       size_t trigger_tlv_len[FW_DBG_TRIGGER_MAX];
+       struct iwl_fw_dbg_mem_seg_tlv *mem_tlv;
+       size_t n_mem_tlv;
+       u32 dump_mask;
+};
+
 /**
  * struct iwl_fw - variables associated with the firmware
  *
  * @cipher_scheme: optional external cipher scheme.
  * @human_readable: human readable version
  *     we get the ALIVE from the uCode
- * @dbg_dest_tlv: points to the destination TLV for debug
- * @dbg_conf_tlv: array of pointers to configuration TLVs for debug
- * @dbg_conf_tlv_len: lengths of the @dbg_conf_tlv entries
- * @dbg_trigger_tlv: array of pointers to triggers TLVs
- * @dbg_trigger_tlv_len: lengths of the @dbg_trigger_tlv entries
- * @dbg_dest_reg_num: num of reg_ops in %dbg_dest_tlv
  */
 struct iwl_fw {
        u32 ucode_ver;
        struct iwl_fw_cipher_scheme cs[IWL_UCODE_MAX_CS];
        u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
 
-       struct iwl_fw_dbg_dest_tlv_v1 *dbg_dest_tlv;
-       struct iwl_fw_dbg_conf_tlv *dbg_conf_tlv[FW_DBG_CONF_MAX];
-       size_t dbg_conf_tlv_len[FW_DBG_CONF_MAX];
-       struct iwl_fw_dbg_trigger_tlv *dbg_trigger_tlv[FW_DBG_TRIGGER_MAX];
-       struct iwl_fw_dbg_mem_seg_tlv *dbg_mem_tlv;
-       size_t n_dbg_mem_tlv;
-       size_t dbg_trigger_tlv_len[FW_DBG_TRIGGER_MAX];
-       u8 dbg_dest_reg_num;
-       u32 dbg_dump_mask;
+       struct iwl_fw_dbg dbg;
 };
 
 static inline const char *get_fw_dbg_mode_string(int mode)
 static inline bool
 iwl_fw_dbg_conf_usniffer(const struct iwl_fw *fw, u8 id)
 {
-       const struct iwl_fw_dbg_conf_tlv *conf_tlv = fw->dbg_conf_tlv[id];
+       const struct iwl_fw_dbg_conf_tlv *conf_tlv = fw->dbg.conf_tlv[id];
 
        if (!conf_tlv)
                return false;
 
 {
        int i;
 
-       kfree(drv->fw.dbg_dest_tlv);
-       for (i = 0; i < ARRAY_SIZE(drv->fw.dbg_conf_tlv); i++)
-               kfree(drv->fw.dbg_conf_tlv[i]);
-       for (i = 0; i < ARRAY_SIZE(drv->fw.dbg_trigger_tlv); i++)
-               kfree(drv->fw.dbg_trigger_tlv[i]);
-       kfree(drv->fw.dbg_mem_tlv);
+       kfree(drv->fw.dbg.dest_tlv);
+       for (i = 0; i < ARRAY_SIZE(drv->fw.dbg.conf_tlv); i++)
+               kfree(drv->fw.dbg.conf_tlv[i]);
+       for (i = 0; i < ARRAY_SIZE(drv->fw.dbg.trigger_tlv); i++)
+               kfree(drv->fw.dbg.trigger_tlv[i]);
+       kfree(drv->fw.dbg.mem_tlv);
        kfree(drv->fw.iml);
 
        for (i = 0; i < IWL_UCODE_TYPE_MAX; i++)
        struct iwl_fw_dbg_trigger_tlv *dbg_trigger_tlv[FW_DBG_TRIGGER_MAX];
        size_t dbg_trigger_tlv_len[FW_DBG_TRIGGER_MAX];
        struct iwl_fw_dbg_mem_seg_tlv *dbg_mem_tlv;
-       size_t n_dbg_mem_tlv;
+       size_t n_mem_tlv;
 };
 
 /*
                        IWL_INFO(drv, "Found debug destination: %s\n",
                                 get_fw_dbg_mode_string(mon_mode));
 
-                       drv->fw.dbg_dest_reg_num = (dest_v1) ?
+                       drv->fw.dbg.n_dest_reg = (dest_v1) ?
                                tlv_len -
                                offsetof(struct iwl_fw_dbg_dest_tlv_v1,
                                         reg_ops) :
                                offsetof(struct iwl_fw_dbg_dest_tlv,
                                         reg_ops);
 
-                       drv->fw.dbg_dest_reg_num /=
-                               sizeof(drv->fw.dbg_dest_tlv->reg_ops[0]);
+                       drv->fw.dbg.n_dest_reg /=
+                               sizeof(drv->fw.dbg.dest_tlv->reg_ops[0]);
 
                        break;
                        }
                                break;
                        }
 
-                       if (conf->id >= ARRAY_SIZE(drv->fw.dbg_conf_tlv)) {
+                       if (conf->id >= ARRAY_SIZE(drv->fw.dbg.conf_tlv)) {
                                IWL_ERR(drv,
                                        "Skip unknown configuration: %d\n",
                                        conf->id);
                                (void *)tlv_data;
                        u32 trigger_id = le32_to_cpu(trigger->id);
 
-                       if (trigger_id >= ARRAY_SIZE(drv->fw.dbg_trigger_tlv)) {
+                       if (trigger_id >= ARRAY_SIZE(drv->fw.dbg.trigger_tlv)) {
                                IWL_ERR(drv,
                                        "Skip unknown trigger: %u\n",
                                        trigger->id);
                                break;
                        }
 
-                       drv->fw.dbg_dump_mask =
+                       drv->fw.dbg.dump_mask =
                                le32_to_cpup((__le32 *)tlv_data);
                        break;
                        }
                                       dbg_mem->data_type);
 
                        size = sizeof(*pieces->dbg_mem_tlv) *
-                              (pieces->n_dbg_mem_tlv + 1);
+                              (pieces->n_mem_tlv + 1);
                        n = krealloc(pieces->dbg_mem_tlv, size, GFP_KERNEL);
                        if (!n)
                                return -ENOMEM;
                        pieces->dbg_mem_tlv = n;
-                       pieces->dbg_mem_tlv[pieces->n_dbg_mem_tlv] = *dbg_mem;
-                       pieces->n_dbg_mem_tlv++;
+                       pieces->dbg_mem_tlv[pieces->n_mem_tlv] = *dbg_mem;
+                       pieces->n_mem_tlv++;
                        break;
                        }
                case IWL_UCODE_TLV_IML: {
                        IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE;
        fw->ucode_capa.n_scan_channels = IWL_DEFAULT_SCAN_CHANNELS;
        /* dump all fw memory areas by default except d3 debug data */
-       fw->dbg_dump_mask = 0xfffdffff;
+       fw->dbg.dump_mask = 0xfffdffff;
 
        pieces = kzalloc(sizeof(*pieces), GFP_KERNEL);
        if (!pieces)
                        goto out_free_fw;
 
        if (pieces->dbg_dest_tlv_init) {
-               size_t dbg_dest_size = sizeof(*drv->fw.dbg_dest_tlv) +
-                       sizeof(drv->fw.dbg_dest_tlv->reg_ops[0]) *
-                       drv->fw.dbg_dest_reg_num;
+               size_t dbg_dest_size = sizeof(*drv->fw.dbg.dest_tlv) +
+                       sizeof(drv->fw.dbg.dest_tlv->reg_ops[0]) *
+                       drv->fw.dbg.n_dest_reg;
 
-               drv->fw.dbg_dest_tlv = kmalloc(dbg_dest_size, GFP_KERNEL);
+               drv->fw.dbg.dest_tlv = kmalloc(dbg_dest_size, GFP_KERNEL);
 
-               if (!drv->fw.dbg_dest_tlv)
+               if (!drv->fw.dbg.dest_tlv)
                        goto out_free_fw;
 
                if (*pieces->dbg_dest_ver == 0) {
-                       memcpy(drv->fw.dbg_dest_tlv, pieces->dbg_dest_tlv_v1,
+                       memcpy(drv->fw.dbg.dest_tlv, pieces->dbg_dest_tlv_v1,
                               dbg_dest_size);
                } else {
                        struct iwl_fw_dbg_dest_tlv_v1 *dest_tlv =
-                               drv->fw.dbg_dest_tlv;
+                               drv->fw.dbg.dest_tlv;
 
                        dest_tlv->version = pieces->dbg_dest_tlv->version;
                        dest_tlv->monitor_mode =
                                pieces->dbg_dest_tlv->base_shift;
                        memcpy(dest_tlv->reg_ops,
                               pieces->dbg_dest_tlv->reg_ops,
-                              sizeof(drv->fw.dbg_dest_tlv->reg_ops[0]) *
-                              drv->fw.dbg_dest_reg_num);
+                              sizeof(drv->fw.dbg.dest_tlv->reg_ops[0]) *
+                              drv->fw.dbg.n_dest_reg);
 
                        /* In version 1 of the destination tlv, which is
                         * relevant for internal buffer exclusively,
                }
        }
 
-       for (i = 0; i < ARRAY_SIZE(drv->fw.dbg_conf_tlv); i++) {
+       for (i = 0; i < ARRAY_SIZE(drv->fw.dbg.conf_tlv); i++) {
                if (pieces->dbg_conf_tlv[i]) {
-                       drv->fw.dbg_conf_tlv_len[i] =
-                               pieces->dbg_conf_tlv_len[i];
-                       drv->fw.dbg_conf_tlv[i] =
+                       drv->fw.dbg.conf_tlv[i] =
                                kmemdup(pieces->dbg_conf_tlv[i],
-                                       drv->fw.dbg_conf_tlv_len[i],
+                                       pieces->dbg_conf_tlv_len[i],
                                        GFP_KERNEL);
-                       if (!drv->fw.dbg_conf_tlv[i])
+                       if (!pieces->dbg_conf_tlv_len[i])
                                goto out_free_fw;
                }
        }
        trigger_tlv_sz[FW_DBG_TRIGGER_TDLS] =
                sizeof(struct iwl_fw_dbg_trigger_tdls);
 
-       for (i = 0; i < ARRAY_SIZE(drv->fw.dbg_trigger_tlv); i++) {
+       for (i = 0; i < ARRAY_SIZE(drv->fw.dbg.trigger_tlv); i++) {
                if (pieces->dbg_trigger_tlv[i]) {
                        /*
                         * If the trigger isn't long enough, WARN and exit.
                                    (trigger_tlv_sz[i] +
                                     sizeof(struct iwl_fw_dbg_trigger_tlv))))
                                goto out_free_fw;
-                       drv->fw.dbg_trigger_tlv_len[i] =
+                       drv->fw.dbg.trigger_tlv_len[i] =
                                pieces->dbg_trigger_tlv_len[i];
-                       drv->fw.dbg_trigger_tlv[i] =
+                       drv->fw.dbg.trigger_tlv[i] =
                                kmemdup(pieces->dbg_trigger_tlv[i],
-                                       drv->fw.dbg_trigger_tlv_len[i],
+                                       drv->fw.dbg.trigger_tlv_len[i],
                                        GFP_KERNEL);
-                       if (!drv->fw.dbg_trigger_tlv[i])
+                       if (!drv->fw.dbg.trigger_tlv[i])
                                goto out_free_fw;
                }
        }
 
        /* Now that we can no longer fail, copy information */
 
-       drv->fw.dbg_mem_tlv = pieces->dbg_mem_tlv;
+       drv->fw.dbg.mem_tlv = pieces->dbg_mem_tlv;
        pieces->dbg_mem_tlv = NULL;
-       drv->fw.n_dbg_mem_tlv = pieces->n_dbg_mem_tlv;
+       drv->fw.dbg.n_mem_tlv = pieces->n_mem_tlv;
 
        /*
         * The (size - 16) / 12 formula is based on the information recorded
 
  * @dbg_dest_tlv: points to the destination TLV for debug
  * @dbg_conf_tlv: array of pointers to configuration TLVs for debug
  * @dbg_trigger_tlv: array of pointers to triggers TLVs for debug
- * @dbg_dest_reg_num: num of reg_ops in %dbg_dest_tlv
+ * @dbg_n_dest_reg: num of reg_ops in %dbg_dest_tlv
  * @num_blocks: number of blocks in fw_mon
  * @fw_mon: address of the buffers for firmware monitor
  * @system_pm_mode: the system-wide power management mode in use.
        const struct iwl_fw_dbg_conf_tlv *dbg_conf_tlv[FW_DBG_CONF_MAX];
        struct iwl_fw_dbg_trigger_tlv * const *dbg_trigger_tlv;
        u32 dbg_dump_mask;
-       u8 dbg_dest_reg_num;
+       u8 dbg_n_dest_reg;
        int num_blocks;
        struct iwl_dram_data fw_mon[IWL_MAX_DEBUG_ALLOCATIONS];
 
 
 
        mvm->fwrt.dump.conf = FW_DBG_INVALID;
        /* if we have a destination, assume EARLY START */
-       if (mvm->fw->dbg_dest_tlv)
+       if (mvm->fw->dbg.dest_tlv)
                mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
        iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
 
 
        iwl_trans_configure(mvm->trans, &trans_cfg);
 
        trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD;
-       trans->dbg_dest_tlv = mvm->fw->dbg_dest_tlv;
-       trans->dbg_dest_reg_num = mvm->fw->dbg_dest_reg_num;
-       memcpy(trans->dbg_conf_tlv, mvm->fw->dbg_conf_tlv,
+       trans->dbg_dest_tlv = mvm->fw->dbg.dest_tlv;
+       trans->dbg_n_dest_reg = mvm->fw->dbg.n_dest_reg;
+       memcpy(trans->dbg_conf_tlv, mvm->fw->dbg.conf_tlv,
               sizeof(trans->dbg_conf_tlv));
-       trans->dbg_trigger_tlv = mvm->fw->dbg_trigger_tlv;
-       trans->dbg_dump_mask = mvm->fw->dbg_dump_mask;
+       trans->dbg_trigger_tlv = mvm->fw->dbg.trigger_tlv;
+       trans->dbg_dump_mask = mvm->fw->dbg.dump_mask;
 
        trans->iml = mvm->fw->iml;
        trans->iml_len = mvm->fw->iml_len;
 
        else
                IWL_WARN(trans, "PCI should have external buffer debug\n");
 
-       for (i = 0; i < trans->dbg_dest_reg_num; i++) {
+       for (i = 0; i < trans->dbg_n_dest_reg; i++) {
                u32 addr = le32_to_cpu(dest->reg_ops[i].addr);
                u32 val = le32_to_cpu(dest->reg_ops[i].val);