]> www.infradead.org Git - users/hch/misc.git/commitdiff
arm64: dts: rockchip: Enable more power domains for RK3528
authorJonas Karlman <jonas@kwiboo.se>
Thu, 21 Aug 2025 21:18:41 +0000 (21:18 +0000)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 24 Aug 2025 06:24:03 +0000 (08:24 +0200)
Describe device power-domains and enable the PD_RKVENC, PD_VO and PD_VPU
power-domains on RK3528.

The PD_RKVDEC is used by RKVDEC and DDRPHY CRU, and is kept disabled to
prevent a full system reset trying to read the rate of the SCMI_CLK_DDR
clock.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250821211843.3051349-2-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3528.dtsi

index 58c8977249bea22e3db9810dc47d12b3e3fb7554..db5dbcac7756619ffbe33bcc9997133f353680ba 100644 (file)
                        gpio-ranges = <&pinctrl 0 32 32>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
+                       power-domains = <&power RK3528_PD_VPU>;
                };
 
                gpio2: gpio@ffb00000 {
                        gpio-ranges = <&pinctrl 0 64 32>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
+                       power-domains = <&power RK3528_PD_VO>;
                };
 
                gpio3: gpio@ffb10000 {
                        gpio-ranges = <&pinctrl 0 96 32>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
+                       power-domains = <&power RK3528_PD_VPU>;
                };
 
                gpio4: gpio@ffb20000 {
                        gpio-ranges = <&pinctrl 0 128 32>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
+                       power-domains = <&power RK3528_PD_RKVENC>;
                };
        };
 
                                        reg = <RK3528_PD_RKVENC>;
                                        pm_qos = <&qos_rkvenc>;
                                        #power-domain-cells = <0>;
-                                       status = "disabled";
                                };
                                power-domain@RK3528_PD_VO {
                                        reg = <RK3528_PD_VO>;
                                                 <&qos_vdpp>,
                                                 <&qos_vop>;
                                        #power-domain-cells = <0>;
-                                       status = "disabled";
                                };
                                power-domain@RK3528_PD_VPU {
                                        reg = <RK3528_PD_VPU>;
                                                 <&qos_usb3otg>,
                                                 <&qos_vpu>;
                                        #power-domain-cells = <0>;
-                                       status = "disabled";
                                };
                        };
                };
                        interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
                        dmas = <&dmac 25>, <&dmac 24>;
                        dma-names = "tx", "rx";
+                       power-domains = <&power RK3528_PD_RKVENC>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
                        dmas = <&dmac 31>, <&dmac 30>;
                        dma-names = "tx", "rx";
+                       power-domains = <&power RK3528_PD_VPU>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        clock-names = "baudclk", "apb_pclk";
                        interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                        dmas = <&dmac 11>, <&dmac 10>;
+                       power-domains = <&power RK3528_PD_RKVENC>;
                        reg-io-width = <4>;
                        reg-shift = <2>;
                        status = "disabled";
                        clock-names = "baudclk", "apb_pclk";
                        interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
                        dmas = <&dmac 13>, <&dmac 12>;
+                       power-domains = <&power RK3528_PD_VPU>;
                        reg-io-width = <4>;
                        reg-shift = <2>;
                        status = "disabled";
                        clock-names = "baudclk", "apb_pclk";
                        interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
                        dmas = <&dmac 15>, <&dmac 14>;
+                       power-domains = <&power RK3528_PD_RKVENC>;
                        reg-io-width = <4>;
                        reg-shift = <2>;
                        status = "disabled";
                        clock-names = "baudclk", "apb_pclk";
                        interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
                        dmas = <&dmac 17>, <&dmac 16>;
+                       power-domains = <&power RK3528_PD_VO>;
                        reg-io-width = <4>;
                        reg-shift = <2>;
                        status = "disabled";
                        clock-names = "baudclk", "apb_pclk";
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
                        dmas = <&dmac 19>, <&dmac 18>;
+                       power-domains = <&power RK3528_PD_VPU>;
                        reg-io-width = <4>;
                        reg-shift = <2>;
                        status = "disabled";
                        clock-names = "baudclk", "apb_pclk";
                        interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
                        dmas = <&dmac 21>, <&dmac 20>;
+                       power-domains = <&power RK3528_PD_VPU>;
                        reg-io-width = <4>;
                        reg-shift = <2>;
                        status = "disabled";
                        clock-names = "baudclk", "apb_pclk";
                        interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
                        dmas = <&dmac 23>, <&dmac 22>;
+                       power-domains = <&power RK3528_PD_VPU>;
                        reg-io-width = <4>;
                        reg-shift = <2>;
                        status = "disabled";
                        clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>;
                        clock-names = "i2c", "pclk";
                        interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&power RK3528_PD_RKVENC>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
                        clock-names = "i2c", "pclk";
                        interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&power RK3528_PD_RKVENC>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
                        clock-names = "i2c", "pclk";
                        interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&power RK3528_PD_VPU>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&i2c4_xfer>;
+                       power-domains = <&power RK3528_PD_VO>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
                        clock-names = "i2c", "pclk";
                        interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&power RK3528_PD_VPU>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        clocks = <&cru CLK_I2C6>, <&cru PCLK_I2C6>;
                        clock-names = "i2c", "pclk";
                        interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&power RK3528_PD_VPU>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&i2c7_xfer>;
+                       power-domains = <&power RK3528_PD_VO>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
                        clock-names = "saradc", "apb_pclk";
                        interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&power RK3528_PD_VPU>;
                        resets = <&cru SRST_P_SARADC>;
                        reset-names = "saradc-apb";
                        #io-channel-cells = <1>;
                        interrupt-names = "macirq", "eth_wake_irq";
                        phy-handle = <&rmii0_phy>;
                        phy-mode = "rmii";
+                       power-domains = <&power RK3528_PD_VO>;
                        resets = <&cru SRST_A_MAC_VO>;
                        reset-names = "stmmaceth";
                        rockchip,grf = <&vo_grf>;
                        interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "macirq", "eth_wake_irq";
+                       power-domains = <&power RK3528_PD_VPU>;
                        resets = <&cru SRST_A_MAC>;
                        reset-names = "stmmaceth";
                        rockchip,grf = <&vpu_grf>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>,
                                    <&emmc_strb>;
+                       power-domains = <&power RK3528_PD_VPU>;
                        resets = <&cru SRST_C_EMMC>, <&cru SRST_H_EMMC>,
                                 <&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>,
                                 <&cru SRST_T_EMMC>;
                        max-frequency = <200000000>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&sdio0_bus4>, <&sdio0_clk>, <&sdio0_cmd>;
+                       power-domains = <&power RK3528_PD_VPU>;
                        resets = <&cru SRST_H_SDIO0>;
                        reset-names = "reset";
                        status = "disabled";
                        max-frequency = <200000000>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&sdio1_bus4>, <&sdio1_clk>, <&sdio1_cmd>;
+                       power-domains = <&power RK3528_PD_VPU>;
                        resets = <&cru SRST_H_SDIO1>;
                        reset-names = "reset";
                        status = "disabled";
                        pinctrl-names = "default";
                        pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>,
                                    <&sdmmc_det>;
+                       power-domains = <&power RK3528_PD_VO>;
                        resets = <&cru SRST_H_SDMMC0>;
                        reset-names = "reset";
                        rockchip,default-sample-phase = <90>;