]> www.infradead.org Git - users/willy/xarray.git/commitdiff
arm64: dts: ti: Add bootph property to nodes at source for am62a
authorParesh Bhagat <p-bhagat@ti.com>
Tue, 8 Jul 2025 08:58:36 +0000 (14:28 +0530)
committerVignesh Raghavendra <vigneshr@ti.com>
Thu, 10 Jul 2025 04:19:13 +0000 (09:49 +0530)
Add bootph property directly into the original definitions of relevant
nodes (e.g., power domains, USB controllers, and other peripherals)
within their respective DTSI files (ex. main, mcu, and wakeup) for
am62a.

By defining bootph in the nodes source definitions instead of appending
it later in final DTS files, this change ensures that the property is
inherently present wherever the nodes are reused across derived device
trees.

Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250708085839.1498505-2-p-bhagat@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi

index 63e097ddf988cabc93c7fad08485e990e742ca92..44e7e459f1769ea85356eaa7f61f43d0fc0ec7fe 100644 (file)
@@ -51,6 +51,7 @@
                        compatible = "ti,am654-phy-gmii-sel";
                        reg = <0x4044 0x8>;
                        #phy-cells = <1>;
+                       bootph-all;
                };
 
                epwm_tbclk: clock-controller@4130 {
@@ -96,6 +97,7 @@
                        #mbox-cells = <1>;
                        interrupt-names = "rx_012";
                        interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+                       bootph-all;
                };
 
                inta_main_dmss: interrupt-controller@48000000 {
                        ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
                        ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
                        ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
+                       bootph-all;
                };
 
                main_pktdma: dma-controller@485c0000 {
                                    "ring", "tchan", "rchan", "rflow";
                        msi-parent = <&inta_main_dmss>;
                        #dma-cells = <2>;
+                       bootph-all;
+
                        ti,sci = <&dmsc>;
                        ti,sci-dev-id = <30>;
                        ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
                k3_pds: power-controller {
                        compatible = "ti,sci-pm-domain";
                        #power-domain-cells = <2>;
+                       bootph-all;
                };
 
                k3_clks: clock-controller {
                        compatible = "ti,k2g-sci-clk";
                        #clock-cells = <2>;
+                       bootph-all;
                };
 
                k3_reset: reset-controller {
                        compatible = "ti,sci-reset";
                        #reset-cells = <2>;
+                       bootph-all;
                };
        };
 
                 * firmware on non-MPU processors
                 */
                status = "disabled";
+               bootph-all;
        };
 
        main_pmx0: pinctrl@f4000 {
                assigned-clock-parents = <&k3_clks 36 3>;
                power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
                ti,timer-pwm;
+               bootph-all;
        };
 
        main_timer1: timer@2410000 {
                        interrupt-names = "host", "peripheral";
                        maximum-speed = "high-speed";
                        dr_mode = "otg";
+                       bootph-all;
                        snps,usb2-gadget-lpm-disable;
                        snps,usb2-lpm-disable;
                };
                                phys = <&phy_gmii_sel 1>;
                                mac-address = [00 00 00 00 00 00];
                                ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
+                               bootph-all;
                        };
 
                        cpsw_port2: port@2 {
                        clocks = <&k3_clks 13 0>;
                        clock-names = "fck";
                        bus_freq = <1000000>;
+                       bootph-all;
                };
 
                cpts@3d000 {
index 259ae6ebbfb5ac5f83cc2c159c779ecaf9f96dcf..9ef1c829a9df555d3694d063d149342d1a50fc9d 100644 (file)
@@ -17,6 +17,7 @@
                chipid: chipid@14 {
                        compatible = "ti,am654-chipid";
                        reg = <0x14 0x4>;
+                       bootph-all;
                };
 
                opp_efuse_table: syscon@18 {
@@ -67,6 +68,7 @@
                        reg = <0 0x100>;
                        interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
+                       bootph-pre-ram;
               };
        };