#include <linux/uio_driver.h>
 #include <linux/sh_dma.h>
 #include <linux/sh_timer.h>
+#include <linux/sh_intc.h>
 #include <linux/io.h>
 #include <linux/notifier.h>
 
        },
        {
                .name   = "error_irq",
-               .start  = 78,
-               .end    = 78,
+               .start  = evt2irq(0xbc0),
+               .end    = evt2irq(0xbc0),
                .flags  = IORESOURCE_IRQ,
        },
        {
                /* IRQ for channels 0-3 */
-               .start  = 48,
-               .end    = 51,
+               .start  = evt2irq(0x800),
+               .end    = evt2irq(0x860),
                .flags  = IORESOURCE_IRQ,
        },
        {
                /* IRQ for channels 4-5 */
-               .start  = 76,
-               .end    = 77,
+               .start  = evt2irq(0xb80),
+               .end    = evt2irq(0xba0),
                .flags  = IORESOURCE_IRQ,
        },
 };
        },
        {
                .name   = "error_irq",
-               .start  = 74,
-               .end    = 74,
+               .start  = evt2irq(0xb40),
+               .end    = evt2irq(0xb40),
                .flags  = IORESOURCE_IRQ,
        },
        {
                /* IRQ for channels 0-3 */
-               .start  = 40,
-               .end    = 43,
+               .start  = evt2irq(0x700),
+               .end    = evt2irq(0x760),
                .flags  = IORESOURCE_IRQ,
        },
        {
                /* IRQ for channels 4-5 */
-               .start  = 72,
-               .end    = 73,
+               .start  = evt2irq(0xb00),
+               .end    = evt2irq(0xb20),
                .flags  = IORESOURCE_IRQ,
        },
 };
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
-       .irqs           = { 80, 80, 80, 80 },
+       .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),
        .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
-       .irqs           = { 81, 81, 81, 81 },
+       .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),
        .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
-       .irqs           = { 82, 82, 82, 82 },
+       .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),
        .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 
        .scscr          = SCSCR_RE | SCSCR_TE,
        .scbrr_algo_id  = SCBRR_ALGO_3,
        .type           = PORT_SCIFA,
-       .irqs           = { 56, 56, 56, 56 },
+       .irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),
 };
 
 static struct platform_device scif3_device = {
        .scscr          = SCSCR_RE | SCSCR_TE,
        .scbrr_algo_id  = SCBRR_ALGO_3,
        .type           = PORT_SCIFA,
-       .irqs           = { 88, 88, 88, 88 },
+       .irqs           = SCIx_IRQ_MUXED(evt2irq(0xd00)),
 };
 
 static struct platform_device scif4_device = {
        .scscr          = SCSCR_RE | SCSCR_TE,
        .scbrr_algo_id  = SCBRR_ALGO_3,
        .type           = PORT_SCIFA,
-       .irqs           = { 109, 109, 109, 109 },
+       .irqs           = SCIx_IRQ_MUXED(evt2irq(0xfa0)),
 };
 
 static struct platform_device scif5_device = {
        },
        [1] = {
                /* Period IRQ */
-               .start  = 69,
+               .start  = evt2irq(0xaa0),
                .flags  = IORESOURCE_IRQ,
        },
        [2] = {
                /* Carry IRQ */
-               .start  = 70,
+               .start  = evt2irq(0xac0),
                .flags  = IORESOURCE_IRQ,
        },
        [3] = {
                /* Alarm IRQ */
-               .start  = 68,
+               .start  = evt2irq(0xa80),
                .flags  = IORESOURCE_IRQ,
        },
 };
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 96,
-               .end    = 99,
+               .start  = evt2irq(0xe00),
+               .end    = evt2irq(0xe60),
                .flags  = IORESOURCE_IRQ,
        },
 };
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 92,
-               .end    = 95,
+               .start  = evt2irq(0xd80),
+               .end    = evt2irq(0xde0),
                .flags  = IORESOURCE_IRQ,
        },
 };
 static struct uio_info vpu_platform_data = {
        .name = "VPU5F",
        .version = "0",
-       .irq = 60,
+       .irq = evt2irq(0x980),
 };
 
 static struct resource vpu_resources[] = {
 static struct uio_info veu0_platform_data = {
        .name = "VEU3F0",
        .version = "0",
-       .irq = 83,
+       .irq = evt2irq(0xc60),
 };
 
 static struct resource veu0_resources[] = {
 static struct uio_info veu1_platform_data = {
        .name = "VEU3F1",
        .version = "0",
-       .irq = 54,
+       .irq = evt2irq(0x8c0),
 };
 
 static struct resource veu1_resources[] = {
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 104,
+               .start  = evt2irq(0xf00),
                .flags  = IORESOURCE_IRQ,
        },
 };
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 16,
+               .start  = evt2irq(0x400),
                .flags  = IORESOURCE_IRQ,
        },
 };
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 17,
+               .start  = evt2irq(0x420),
                .flags  = IORESOURCE_IRQ,
        },
 };
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 18,
+               .start  = evt2irq(0x440),
                .flags  = IORESOURCE_IRQ,
        },
 };
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 57,
+               .start  = evt2irq(0x920),
                .flags  = IORESOURCE_IRQ,
        },
 };
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 58,
+               .start  = evt2irq(0x940),
                .flags  = IORESOURCE_IRQ,
        },
 };
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 57,
+               .start  = evt2irq(0x920),
                .flags  = IORESOURCE_IRQ,
        },
 };
 static struct uio_info jpu_platform_data = {
        .name = "JPU",
        .version = "0",
-       .irq = 27,
+       .irq = evt2irq(0x560),
 };
 
 static struct resource jpu_resources[] = {
 static struct uio_info spu0_platform_data = {
        .name = "SPU2DSP0",
        .version = "0",
-       .irq = 86,
+       .irq = evt2irq(0xcc0),
 };
 
 static struct resource spu0_resources[] = {
 static struct uio_info spu1_platform_data = {
        .name = "SPU2DSP1",
        .version = "0",
-       .irq = 87,
+       .irq = evt2irq(0xce0),
 };
 
 static struct resource spu1_resources[] = {