#define E1000_DEV_ID_PCH2_LV_V                 0x1503
 #define E1000_DEV_ID_PCH_LPT_I217_LM           0x153A
 #define E1000_DEV_ID_PCH_LPT_I217_V            0x153B
+#define E1000_DEV_ID_PCH_LPTLP_I218_LM         0x155A
+#define E1000_DEV_ID_PCH_LPTLP_I218_V          0x1559
 
 #define E1000_REVISION_4 4
 
 
 
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
 
        { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
 };