arm64: dts: ti: k3-j721e: Include entire FSS region in ranges

Add FSS regions at 0x50000000, 0x400000000, and 0x600000000. Although
not used currently by the Linux FSS driver, these regions belong to
the FSS and should be included in the ranges mapping.

While here, a couple of these numbers had missing zeros which was
hidden by odd alignments, fix both these issues.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Santhosh Kumar K <s-k6@ti.com>
Link: https://lore.kernel.org/r/20240828172956.26630-3-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index 6b6ef6a30614262627c3f722cd47fcd975de67bf..3731ffb4a5c9630c06c5dd5f954af8c68704df2c 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -354,8 +354,8 @@
                         <0x0 0x47034000 0x0 0x47034000 0x0 0x100>, /* HBMC Control */
                         <0x0 0x47040000 0x0 0x47040000 0x0 0x100>, /* OSPI0 Control */
                         <0x0 0x47050000 0x0 0x47050000 0x0 0x100>, /* OSPI1 Control */
-                        <0x5 0x00000000 0x5 0x00000000 0x1 0x0000000>, /* HBMC/OSPI0 Memory */
-                        <0x7 0x00000000 0x7 0x00000000 0x1 0x0000000>; /* OSPI1 Memory */
+                        <0x0 0x50000000 0x0 0x50000000 0x0 0x10000000>, /* FSS data region 1 */
+                        <0x4 0x00000000 0x4 0x00000000 0x4 0x00000000>; /* FSS data region 0/3 */
 
                hbmc_mux: mux-controller@47000004 {
                        compatible = "reg-mux";
@@ -367,7 +367,7 @@
                hbmc: hyperbus@47034000 {
                        compatible = "ti,am654-hbmc";
                        reg = <0x00 0x47034000 0x00 0x100>,
-                               <0x05 0x00000000 0x01 0x0000000>;
+                             <0x05 0x00000000 0x01 0x00000000>;
                        power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
                        clocks = <&k3_clks 102 0>;
                        assigned-clocks = <&k3_clks 102 5>;
@@ -381,7 +381,7 @@
                ospi0: spi@47040000 {
                        compatible = "ti,am654-ospi", "cdns,qspi-nor";
                        reg = <0x0 0x47040000 0x0 0x100>,
-                               <0x5 0x00000000 0x1 0x0000000>;
+                             <0x5 0x00000000 0x1 0x00000000>;
                        interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
                        cdns,fifo-depth = <256>;
                        cdns,fifo-width = <4>;
@@ -399,7 +399,7 @@
                ospi1: spi@47050000 {
                        compatible = "ti,am654-ospi", "cdns,qspi-nor";
                        reg = <0x0 0x47050000 0x0 0x100>,
-                               <0x7 0x00000000 0x1 0x00000000>;
+                             <0x7 0x00000000 0x1 0x00000000>;
                        interrupts = <GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH>;
                        cdns,fifo-depth = <256>;
                        cdns,fifo-width = <4>;

diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi
index 5a72c518ceb6be4c9a3d67fd209394dc2b291507..a7f2f52f42f71b42005498cc5970727079d79b15 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi
@@ -145,8 +145,7 @@
                         <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>,
                         <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>,
                         <0x00 0x50000000 0x00 0x50000000 0x00 0x10000000>,
-                        <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>,
-                        <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>;
+                        <0x04 0x00000000 0x04 0x00000000 0x04 0x00000000>;
 
                cbass_mcu_wakeup: bus@28380000 {
                        compatible = "simple-bus";
@@ -162,9 +161,8 @@
                                 <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */
                                 <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, /* CPSW */
                                 <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, /* OSPI register space */
-                                <0x00 0x50000000 0x00 0x50000000 0x00 0x10000000>, /* FSS OSPI0/1 data region 0 */
-                                <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS OSPI0 data region 3 */
-                                <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; /* FSS OSPI1 data region 3*/
+                                <0x00 0x50000000 0x00 0x50000000 0x00 0x10000000>, /* FSS data region 1 */
+                                <0x04 0x00000000 0x04 0x00000000 0x04 0x00000000>; /* FSS data region 0/3 */
                };
        };