x86/cpufeatures: Add X86_FEATURE_RDS

Add the CPU feature bit CPUID.7.0.EDX[31] which indicates whether the CPU
supports Reduced Data Speculation.

[ tglx: Split it out from a later patch ]

OraBug: 28041771
CVE: CVE-2018-3639

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
(cherry picked from commit 0cc5fa00b0a88dad140b4e5c2cead9951ad36822)
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Mihai Carabas <mihai.carabas@oracle.com>
 Conflicts:
	arch/x86/include/asm/cpufeatures.h
[It is called cpufeature.h]
[We also need to use the scattered function to set the flag similar
 to how the rest of CPUID.7.0.EDX[31] are done]

Signed-off-by: Brian Maly <brian.maly@oracle.com>

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 42607449e2cac625a2ed61c771aed41e5d0c86e7..73d256a455fa73aac4eb26e1537400321f9fc6a5 100644 (file)
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -207,6 +207,7 @@
  * But thanks to kABI we have to jam it somewhere else. */
 #define X86_FEATURE_IBPB                (7*32+24) /* Indirect Branch Prediction Barrier */
 
+#define X86_FEATURE_RDS                ( 7*32+25) /* Reduced Data Speculation */
 
 #define X86_FEATURE_VMEXIT_RSB_FULL    (7*32+27) /* "" Whether to stuff the RSB on VMEXIT. */
 #define X86_FEATURE_STUFF_RSB  (7*32+28) /* "" Whether to stuff the RSB (usually dependent on !SMEP) */

diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 4cbbf2520bddafafe4296fdbd8bed65f5116569c..efa7a51ec7ddd49fc6798c2fbab3b941dc365e68 100644 (file)
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -110,6 +110,7 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c,
                { X86_FEATURE_IBRS,             CR_EDX,26, 0x00000007, 0 },
                { X86_FEATURE_STIBP,            CR_EDX,27, 0x00000007, 0 },
                { X86_FEATURE_IA32_ARCH_CAPS,   CR_EDX,29, 0x00000007, 0 },
+               { X86_FEATURE_RDS,              CR_EDX,31, 0x00000007, 0 },
                { X86_FEATURE_HW_PSTATE,        CR_EDX, 7, 0x80000007, 0 },
                { X86_FEATURE_CPB,              CR_EDX, 9, 0x80000007, 0 },
                { X86_FEATURE_PROC_FEEDBACK,    CR_EDX,11, 0x80000007, 0 },