drm/amdgpu/nv: add mode2 reset handling

Vangogh will use mode2 reset, so plumb it through the nv
soc driver.

Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 1d785f06c79d1b856d83614f9833fe9f89282235..1cd0741f14eb937eac1cea6e16120f469dc76010 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -351,6 +351,7 @@ nv_asic_reset_method(struct amdgpu_device *adev)
        struct smu_context *smu = &adev->smu;
 
        if (amdgpu_reset_method == AMD_RESET_METHOD_MODE1 ||
+           amdgpu_reset_method == AMD_RESET_METHOD_MODE2 ||
            amdgpu_reset_method == AMD_RESET_METHOD_BACO)
                return amdgpu_reset_method;
 
@@ -359,6 +360,8 @@ nv_asic_reset_method(struct amdgpu_device *adev)
                                  amdgpu_reset_method);
 
        switch (adev->asic_type) {
+       case CHIP_VANGOGH:
+               return AMD_RESET_METHOD_MODE2;
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
        case CHIP_DIMGREY_CAVEFISH:
@@ -376,7 +379,8 @@ static int nv_asic_reset(struct amdgpu_device *adev)
        int ret = 0;
        struct smu_context *smu = &adev->smu;
 
-       if (nv_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
+       switch (nv_asic_reset_method(adev)) {
+       case AMD_RESET_METHOD_BACO:
                dev_info(adev->dev, "BACO reset\n");
 
                ret = smu_baco_enter(smu);
@@ -385,9 +389,15 @@ static int nv_asic_reset(struct amdgpu_device *adev)
                ret = smu_baco_exit(smu);
                if (ret)
                        return ret;
-       } else {
+               break;
+       case AMD_RESET_METHOD_MODE2:
+               dev_info(adev->dev, "MODE2 reset\n");
+               ret = amdgpu_dpm_mode2_reset(adev);
+               break;
+       default:
                dev_info(adev->dev, "MODE1 reset\n");
                ret = nv_asic_mode1_reset(adev);
+               break;
        }
 
        return ret;