drm/amd/display: Minimize DSC resource re-assignment

[why]
Assigning a different DSC resource than the one previosly used is
currently not handled. This causes black screen on mode change when more
than one monitor is connected on some ASICs.

[how]
- Acquire the previously used DSC if available
- Make sure re-program is triggered if new DSC is used

Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index cb5d11f11cad5130f47d7ee76a2d9f368b1d1b3b..bbef8c67d1dbe0b364530f2422e9d53ec4c53f28 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -2666,6 +2666,9 @@ bool pipe_need_reprogram(
                false == pipe_ctx_old->stream->dpms_off)
                return true;
 
+       if (pipe_ctx_old->stream_res.dsc != pipe_ctx->stream_res.dsc)
+               return true;
+
        return false;
 }
 

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 778e2e8fd2c6bfd61d10f52f4349dc7b598eadb5..4912160f81b3a7012fd747689afac6638db4b08a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -1663,22 +1663,32 @@ enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state
 }
 
 
-static void acquire_dsc(struct resource_context *res_ctx,
-                       const struct resource_pool *pool,
+static void acquire_dsc(const struct dc *dc,
+                       struct resource_context *res_ctx,
                        struct display_stream_compressor **dsc,
                        int pipe_idx)
 {
        int i;
+       const struct resource_pool *pool = dc->res_pool;
+       struct display_stream_compressor *dsc_old = dc->current_state->res_ctx.pipe_ctx[pipe_idx].stream_res.dsc;
 
-       ASSERT(*dsc == NULL);
+       ASSERT(*dsc == NULL); /* If this ASSERT fails, dsc was not released properly */
        *dsc = NULL;
 
+       /* Always do 1-to-1 mapping when number of DSCs is same as number of pipes */
        if (pool->res_cap->num_dsc == pool->res_cap->num_opp) {
                *dsc = pool->dscs[pipe_idx];
                res_ctx->is_dsc_acquired[pipe_idx] = true;
                return;
        }
 
+       /* Return old DSC to avoid the need for re-programming */
+       if (dsc_old && !res_ctx->is_dsc_acquired[dsc_old->inst]) {
+               *dsc = dsc_old;
+               res_ctx->is_dsc_acquired[dsc_old->inst] = true;
+               return ;
+       }
+
        /* Find first free DSC */
        for (i = 0; i < pool->res_cap->num_dsc; i++)
                if (!res_ctx->is_dsc_acquired[i]) {
@@ -1710,7 +1720,6 @@ enum dc_status dcn20_add_dsc_to_stream_resource(struct dc *dc,
 {
        enum dc_status result = DC_OK;
        int i;
-       const struct resource_pool *pool = dc->res_pool;
 
        /* Get a DSC if required and available */
        for (i = 0; i < dc->res_pool->pipe_count; i++) {
@@ -1722,7 +1731,7 @@ enum dc_status dcn20_add_dsc_to_stream_resource(struct dc *dc,
                if (pipe_ctx->stream_res.dsc)
                        continue;
 
-               acquire_dsc(&dc_ctx->res_ctx, pool, &pipe_ctx->stream_res.dsc, i);
+               acquire_dsc(dc, &dc_ctx->res_ctx, &pipe_ctx->stream_res.dsc, i);
 
                /* The number of DSCs can be less than the number of pipes */
                if (!pipe_ctx->stream_res.dsc) {
@@ -1850,12 +1859,13 @@ static void swizzle_to_dml_params(
 }
 
 bool dcn20_split_stream_for_odm(
+               const struct dc *dc,
                struct resource_context *res_ctx,
-               const struct resource_pool *pool,
                struct pipe_ctx *prev_odm_pipe,
                struct pipe_ctx *next_odm_pipe)
 {
        int pipe_idx = next_odm_pipe->pipe_idx;
+       const struct resource_pool *pool = dc->res_pool;
 
        *next_odm_pipe = *prev_odm_pipe;
 
@@ -1913,7 +1923,7 @@ bool dcn20_split_stream_for_odm(
        }
        next_odm_pipe->stream_res.opp = pool->opps[next_odm_pipe->pipe_idx];
        if (next_odm_pipe->stream->timing.flags.DSC == 1) {
-               acquire_dsc(res_ctx, pool, &next_odm_pipe->stream_res.dsc, next_odm_pipe->pipe_idx);
+               acquire_dsc(dc, res_ctx, &next_odm_pipe->stream_res.dsc, next_odm_pipe->pipe_idx);
                ASSERT(next_odm_pipe->stream_res.dsc);
                if (next_odm_pipe->stream_res.dsc == NULL)
                        return false;
@@ -2792,7 +2802,7 @@ bool dcn20_fast_validate_bw(
                        hsplit_pipe = dcn20_find_secondary_pipe(dc, &context->res_ctx, dc->res_pool, pipe);
                        ASSERT(hsplit_pipe);
                        if (!dcn20_split_stream_for_odm(
-                                       &context->res_ctx, dc->res_pool,
+                                       dc, &context->res_ctx,
                                        pipe, hsplit_pipe))
                                goto validate_fail;
                        pipe_split_from[hsplit_pipe->pipe_idx] = pipe_idx;
@@ -2821,7 +2831,7 @@ bool dcn20_fast_validate_bw(
                                }
                                if (context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) {
                                        if (!dcn20_split_stream_for_odm(
-                                                       &context->res_ctx, dc->res_pool,
+                                                       dc, &context->res_ctx,
                                                        pipe, hsplit_pipe))
                                                goto validate_fail;
                                        dcn20_build_mapped_resource(dc, context, pipe->stream);

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
index d5448c9b0e15ea593a7b24fe7ce4f6e49bdd2d06..ed5d31253314a79812c988ef1649d66481aadcc1 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
@@ -136,8 +136,8 @@ void dcn20_split_stream_for_mpc(
                struct pipe_ctx *primary_pipe,
                struct pipe_ctx *secondary_pipe);
 bool dcn20_split_stream_for_odm(
+               const struct dc *dc,
                struct resource_context *res_ctx,
-               const struct resource_pool *pool,
                struct pipe_ctx *prev_odm_pipe,
                struct pipe_ctx *next_odm_pipe);
 struct pipe_ctx *dcn20_find_secondary_pipe(struct dc *dc,