.postclose = radeon_driver_postclose_kms,
        .lastclose = radeon_driver_lastclose_kms,
        .unload = radeon_driver_unload_kms,
-       .irq_preinstall = radeon_driver_irq_preinstall_kms,
-       .irq_postinstall = radeon_driver_irq_postinstall_kms,
-       .irq_uninstall = radeon_driver_irq_uninstall_kms,
-       .irq_handler = radeon_driver_irq_handler_kms,
        .ioctls = radeon_ioctls_kms,
        .num_ioctls = ARRAY_SIZE(radeon_ioctls_kms),
        .dumb_create = radeon_mode_dumb_create,
 
 
 #include <drm/drm_crtc_helper.h>
 #include <drm/drm_device.h>
-#include <drm/drm_irq.h>
+#include <drm/drm_drv.h>
 #include <drm/drm_probe_helper.h>
 #include <drm/drm_vblank.h>
 #include <drm/radeon_drm.h>
  * radeon_irq_process is a macro that points to the per-asic
  * irq handler callback.
  */
-irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
+static irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
 {
        struct drm_device *dev = (struct drm_device *) arg;
        struct radeon_device *rdev = dev->dev_private;
  * Gets the hw ready to enable irqs (all asics).
  * This function disables all interrupt sources on the GPU.
  */
-void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
+static void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
 {
        struct radeon_device *rdev = dev->dev_private;
        unsigned long irqflags;
  * Handles stuff to be done after enabling irqs (all asics).
  * Returns 0 on success.
  */
-int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
+static int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
 {
        struct radeon_device *rdev = dev->dev_private;
 
  *
  * This function disables all interrupt sources on the GPU (all asics).
  */
-void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
+static void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
 {
        struct radeon_device *rdev = dev->dev_private;
        unsigned long irqflags;
        spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 }
 
+static int radeon_irq_install(struct radeon_device *rdev, int irq)
+{
+       struct drm_device *dev = rdev->ddev;
+       int ret;
+
+       if (irq == IRQ_NOTCONNECTED)
+               return -ENOTCONN;
+
+       radeon_driver_irq_preinstall_kms(dev);
+
+       /* PCI devices require shared interrupts. */
+       ret = request_irq(irq, radeon_driver_irq_handler_kms,
+                         IRQF_SHARED, dev->driver->name, dev);
+       if (ret)
+               return ret;
+
+       radeon_driver_irq_postinstall_kms(dev);
+
+       return 0;
+}
+
+static void radeon_irq_uninstall(struct radeon_device *rdev)
+{
+       struct drm_device *dev = rdev->ddev;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
+
+       radeon_driver_irq_uninstall_kms(dev);
+       free_irq(pdev->irq, dev);
+}
+
 /**
  * radeon_msi_ok - asic specific msi checks
  *
        INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
 
        rdev->irq.installed = true;
-       r = drm_irq_install(rdev->ddev, rdev->pdev->irq);
+       r = radeon_irq_install(rdev, rdev->pdev->irq);
        if (r) {
                rdev->irq.installed = false;
                flush_delayed_work(&rdev->hotplug_work);
 void radeon_irq_kms_fini(struct radeon_device *rdev)
 {
        if (rdev->irq.installed) {
-               drm_irq_uninstall(rdev->ddev);
+               radeon_irq_uninstall(rdev);
                rdev->irq.installed = false;
                if (rdev->msi_enabled)
                        pci_disable_msi(rdev->pdev);