pinctrl: ocelot: Fix GPIO interrupt decoding on Jaguar2

[ Upstream commit 0b47afc65453a70bc521e251138418056f65793f ]

This fixes a problem with using the GPIO as an interrupt on Jaguar2
(and similar), as the register layout of the platforms with 64 GPIO's
are pairwise, such that the original offset must be multiplied with
the platform stride.

Fixes: da801ab56ad8 pinctrl: ocelot: add MSCC Jaguar2 support.
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Link: https://lore.kernel.org/r/20200513125532.24585-4-lars.povlsen@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
index fb76fb2e9ea542739867716985cca84eb9e47845..0a951a75c82b38a61ae8971a5f1c5a61a2809e8b 100644 (file)
--- a/drivers/pinctrl/pinctrl-ocelot.c
+++ b/drivers/pinctrl/pinctrl-ocelot.c
@@ -711,11 +711,12 @@ static void ocelot_irq_handler(struct irq_desc *desc)
        struct irq_chip *parent_chip = irq_desc_get_chip(desc);
        struct gpio_chip *chip = irq_desc_get_handler_data(desc);
        struct ocelot_pinctrl *info = gpiochip_get_data(chip);
+       unsigned int id_reg = OCELOT_GPIO_INTR_IDENT * info->stride;
        unsigned int reg = 0, irq, i;
        unsigned long irqs;
 
        for (i = 0; i < info->stride; i++) {
-               regmap_read(info->map, OCELOT_GPIO_INTR_IDENT + 4 * i, &reg);
+               regmap_read(info->map, id_reg + 4 * i, &reg);
                if (!reg)
                        continue;