struct dpu_encoder_virt *dpu_enc = NULL;
        int ret = 0;
        struct drm_display_mode *cur_mode = NULL;
+       struct msm_drm_private *priv = drm_enc->dev->dev_private;
+       struct msm_display_info *disp_info;
 
        dpu_enc = to_dpu_encoder_virt(drm_enc);
+       disp_info = &dpu_enc->disp_info;
 
        dpu_enc->dsc = dpu_encoder_get_dsc_config(drm_enc);
 
+       if (disp_info->intf_type == INTF_DP)
+               dpu_enc->wide_bus_en = msm_dp_wide_bus_available(
+                               priv->dp[disp_info->h_tile_instance[0]]);
+
        mutex_lock(&dpu_enc->enc_lock);
        cur_mode = &dpu_enc->base.crtc->state->adjusted_mode;
 
        timer_setup(&dpu_enc->frame_done_timer,
                        dpu_encoder_frame_done_timeout, 0);
 
-       if (disp_info->intf_type == INTF_DP)
-               dpu_enc->wide_bus_en = msm_dp_wide_bus_available(
-                               priv->dp[disp_info->h_tile_instance[0]]);
-
        INIT_DELAYED_WORK(&dpu_enc->delayed_off_work,
                        dpu_encoder_off_work);
        dpu_enc->idle_timeout = IDLE_TIMEOUT;