]> www.infradead.org Git - linux.git/commitdiff
arm64: dts: amlogic: setup hdmi system clock
authorJerome Brunet <jbrunet@baylibre.com>
Wed, 26 Jun 2024 15:27:31 +0000 (17:27 +0200)
committerNeil Armstrong <neil.armstrong@linaro.org>
Fri, 28 Jun 2024 08:10:42 +0000 (10:10 +0200)
HDMI Tx needs the system clock set on the xtal rate.
This clock is managed by the main clock controller of the related SoCs.

Currently 2 part of the display drivers race to setup the HDMI system
clock by directly poking the controller register. The clock API should
be used to setup the rate instead.

Use assigned-clock to setup the HDMI system clock.

Fixes: 6939db7e0dbf ("ARM64: dts: meson-gx: Add support for HDMI output")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20240626152733.1350376-3-jbrunet@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi

index 4057ee808a582521b9b09efe56752ccdcd5da0e4..d08c97797010d61bbccf7c7a38199beaf9004b43 100644 (file)
                                #sound-dai-cells = <0>;
                                status = "disabled";
 
+                               assigned-clocks = <&clkc CLKID_HDMI_SEL>,
+                                                 <&clkc CLKID_HDMI>;
+                               assigned-clock-parents = <&xtal>, <0>;
+                               assigned-clock-rates = <0>, <24000000>;
+
                                /* VPU VENC Input */
                                hdmi_tx_venc_port: port@0 {
                                        reg = <0>;
index 041c37b809f276e9ce3710423740e40a6eecd6a0..ed00e67e6923a0392acb776e886f848e9522c983 100644 (file)
                 <&clkc CLKID_GCLK_VENCI_INT0>;
        clock-names = "isfr", "iahb", "venci";
        power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
+
+       assigned-clocks = <&clkc CLKID_HDMI_SEL>,
+                         <&clkc CLKID_HDMI>;
+       assigned-clock-parents = <&xtal>, <0>;
+       assigned-clock-rates = <0>, <24000000>;
 };
 
 &sysctrl {
index 067108800a58dec4b03c224f4df99eab069cf454..f58d1790de1cb438cb6c4530648b0a5840f76995 100644 (file)
                 <&clkc CLKID_GCLK_VENCI_INT0>;
        clock-names = "isfr", "iahb", "venci";
        power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
+
+       assigned-clocks = <&clkc CLKID_HDMI_SEL>,
+                         <&clkc CLKID_HDMI>;
+       assigned-clock-parents = <&xtal>, <0>;
+       assigned-clock-rates = <0>, <24000000>;
 };
 
 &sysctrl {