phy_interface_t                 phy_mode;
        struct clk                      *rgmii_tx_clk;
        u32                             tx_delay_ns;
-       u32                             rx_delay_ns;
+       u32                             rx_delay_ps;
        struct clk                      *timing_adj_clk;
 };
 
        tx_dly_config = FIELD_PREP(PRG_ETH0_TXDLY_MASK,
                                   dwmac->tx_delay_ns >> 1);
 
-       if (dwmac->rx_delay_ns == 2)
+       if (dwmac->rx_delay_ps == 2000)
                rx_dly_config = PRG_ETH0_ADJ_ENABLE | PRG_ETH0_ADJ_SETUP;
        else
                rx_dly_config = 0;
                                 &dwmac->tx_delay_ns))
                dwmac->tx_delay_ns = 2;
 
-       /* use 0ns as fallback since this is what most boards actually use */
-       if (of_property_read_u32(pdev->dev.of_node, "amlogic,rx-delay-ns",
-                                &dwmac->rx_delay_ns))
-               dwmac->rx_delay_ns = 0;
+       /* RX delay defaults to 0ps since this is what many boards use */
+       if (of_property_read_u32(pdev->dev.of_node, "rx-internal-delay-ps",
+                                &dwmac->rx_delay_ps)) {
+               if (!of_property_read_u32(pdev->dev.of_node,
+                                         "amlogic,rx-delay-ns",
+                                         &dwmac->rx_delay_ps))
+                       /* convert ns to ps */
+                       dwmac->rx_delay_ps *= 1000;
+       }
 
-       if (dwmac->rx_delay_ns != 0 && dwmac->rx_delay_ns != 2) {
+       if (dwmac->rx_delay_ps != 0 && dwmac->rx_delay_ps != 2000) {
                dev_err(&pdev->dev,
-                       "The only allowed RX delays values are: 0ns, 2ns");
+                       "The only allowed RX delays values are: 0ps, 2000ps");
                ret = -EINVAL;
                goto err_remove_config_dt;
        }