#define CPU_FTR_PPCAS_ARCH_V2  (CPU_FTR_NOEXECUTE | CPU_FTR_NODSISRALIGN)
 
-#define MMU_FTR_PPCAS_ARCH_V2  (MMU_FTR_SLB | MMU_FTR_TLBIEL | \
-                                MMU_FTR_16M_PAGE)
+#define MMU_FTR_PPCAS_ARCH_V2  (MMU_FTR_TLBIEL | MMU_FTR_16M_PAGE)
 
 /* We only set the altivec features if the kernel was compiled with altivec
  * support
 
  */
 #define MMU_FTR_USE_PAIRED_MAS         ASM_CONST(0x01000000)
 
-/* MMU is SLB-based
+/* Doesn't support the B bit (1T segment) in SLBIE
  */
-#define MMU_FTR_SLB                    ASM_CONST(0x02000000)
+#define MMU_FTR_NO_SLBIE_B             ASM_CONST(0x02000000)
 
 /* Support 16M large pages
  */
  */
 #define MMU_FTR_1T_SEGMENT             ASM_CONST(0x40000000)
 
-/* Doesn't support the B bit (1T segment) in SLBIE
- */
-#define MMU_FTR_NO_SLBIE_B             ASM_CONST(0x80000000)
-
 /* MMU feature bit sets for various CPUs */
 #define MMU_FTRS_DEFAULT_HPTE_ARCH_V2  \
        MMU_FTR_HPTE_TABLE | MMU_FTR_PPCAS_ARCH_V2
 
         * sub architectures.
         */
 #ifdef CONFIG_PPC_STD_MMU_64
-       if (mmu_has_feature(MMU_FTR_SLB))
-               switch_slb(tsk, next);
+       switch_slb(tsk, next);
 #else
        /* Out of line for now */
        switch_mmu_context(prev, next);
 
        ld      r8,KSP(r4)      /* new stack pointer */
 #ifdef CONFIG_PPC_BOOK3S
 BEGIN_FTR_SECTION
-  BEGIN_FTR_SECTION_NESTED(95)
        clrrdi  r6,r8,28        /* get its ESID */
        clrrdi  r9,r1,28        /* get current sp ESID */
-  FTR_SECTION_ELSE_NESTED(95)
+FTR_SECTION_ELSE
        clrrdi  r6,r8,40        /* get its 1T ESID */
        clrrdi  r9,r1,40        /* get current sp 1T ESID */
-  ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_1T_SEGMENT, 95)
-FTR_SECTION_ELSE
-       b       2f
-ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_SLB)
+ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_1T_SEGMENT)
        clrldi. r0,r6,2         /* is new ESID c00000000? */
        cmpd    cr1,r6,r9       /* or is new ESID the same as current ESID? */
        cror    eq,4*cr1+eq,eq
 
 #endif
 
 #ifdef CONFIG_PPC_STD_MMU_64
-       if (mmu_has_feature(MMU_FTR_SLB)) {
+       {
                unsigned long sp_vsid;
                unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
 
 
 } ibm_pa_features[] __initdata = {
        {0, 0, PPC_FEATURE_HAS_MMU,     0, 0, 0},
        {0, 0, PPC_FEATURE_HAS_FPU,     0, 1, 0},
-       {0, MMU_FTR_SLB, 0,             0, 2, 0},
        {CPU_FTR_CTRL, 0, 0,            0, 3, 0},
        {CPU_FTR_NOEXECUTE, 0, 0,       0, 6, 0},
        {CPU_FTR_NODSISRALIGN, 0, 0,    1, 1, 1},
 
        htab_initialize();
 
        /* Initialize SLB management */
-       if (mmu_has_feature(MMU_FTR_SLB))
-               slb_initialize();
+       slb_initialize();
 }
 
 #ifdef CONFIG_SMP
                mtspr(SPRN_SDR1, _SDR1);
 
        /* Initialize SLB */
-       if (mmu_has_feature(MMU_FTR_SLB))
-               slb_initialize();
+       slb_initialize();
 }
 #endif /* CONFIG_SMP */
 
 
 }
 
 #ifdef CONFIG_PPC_BOOK3S_64
-static void dump_slb(void)
+void dump_segments(void)
 {
        int i;
        unsigned long esid,vsid,valid;
                }
        }
 }
-
-void dump_segments(void)
-{
-       if (mmu_has_feature(MMU_FTR_SLB))
-               dump_slb();
-}
 #endif
 
 #ifdef CONFIG_PPC_STD_MMU_32