net: hinic: Add control command support for VF PMD driver in DPDK

HINIC has a mailbox for PF-VF communication and the VF driver
could send port control command to PF driver via mailbox.

The control command only can be set to register in PF,
so add support in PF driver for VF PMD driver control
command when VF PMD driver work with linux PF driver.

Then, no need to add handlers to nic_vf_cmd_msg_handler[],
because the host driver just forwards it to the firmware.
Actually the firmware works on a coprocessor MGMT_CPU(inside the NIC)
which will recv and deal with these commands.

Signed-off-by: Cai Huoqing <cai.huoqing@linux.dev>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/huawei/hinic/hinic_hw_dev.h b/drivers/net/ethernet/huawei/hinic/hinic_hw_dev.h
index 6dae116a11f891249d248949a27e4453e3071b66..6b5797e697819eb19bd100dbc1f65bcaaa152cb6 100644 (file)
--- a/drivers/net/ethernet/huawei/hinic/hinic_hw_dev.h
+++ b/drivers/net/ethernet/huawei/hinic/hinic_hw_dev.h
@@ -51,6 +51,9 @@ enum hinic_port_cmd {
        HINIC_PORT_CMD_ADD_VLAN = 0x3,
        HINIC_PORT_CMD_DEL_VLAN = 0x4,
 
+       HINIC_PORT_CMD_SET_ETS = 0x7,
+       HINIC_PORT_CMD_GET_ETS = 0x8,
+
        HINIC_PORT_CMD_SET_PFC = 0x5,
 
        HINIC_PORT_CMD_SET_MAC = 0x9,
@@ -59,6 +62,8 @@ enum hinic_port_cmd {
 
        HINIC_PORT_CMD_SET_RX_MODE = 0xC,
 
+       HINIC_PORT_CMD_SET_ANTI_ATTACK_RATE = 0xD,
+
        HINIC_PORT_CMD_GET_PAUSE_INFO = 0x14,
        HINIC_PORT_CMD_SET_PAUSE_INFO = 0x15,
 
@@ -81,6 +86,7 @@ enum hinic_port_cmd {
        HINIC_PORT_CMD_GET_RSS_TEMPLATE_INDIR_TBL = 0x25,
 
        HINIC_PORT_CMD_SET_PORT_STATE = 0x29,
+       HINIC_PORT_CMD_GET_PORT_STATE = 0x30,
 
        HINIC_PORT_CMD_SET_RSS_TEMPLATE_TBL = 0x2B,
 
@@ -100,17 +106,29 @@ enum hinic_port_cmd {
 
        HINIC_PORT_CMD_RSS_CFG = 0x42,
 
+       HINIC_PORT_CMD_GET_PHY_TYPE = 0x44,
+
        HINIC_PORT_CMD_FWCTXT_INIT = 0x45,
 
        HINIC_PORT_CMD_GET_LOOPBACK_MODE = 0x48,
        HINIC_PORT_CMD_SET_LOOPBACK_MODE = 0x49,
 
+       HINIC_PORT_CMD_GET_JUMBO_FRAME_SIZE = 0x4A,
+       HINIC_PORT_CMD_SET_JUMBO_FRAME_SIZE = 0x4B,
+
        HINIC_PORT_CMD_ENABLE_SPOOFCHK = 0x4E,
 
        HINIC_PORT_CMD_GET_MGMT_VERSION = 0x58,
 
+       HINIC_PORT_CMD_GET_PORT_TYPE = 0x5B,
+
        HINIC_PORT_CMD_SET_FUNC_STATE = 0x5D,
 
+       HINIC_PORT_CMD_GET_PORT_ID_BY_FUNC_ID = 0x5E,
+
+       HINIC_PORT_CMD_GET_DMA_CS = 0x64,
+       HINIC_PORT_CMD_SET_DMA_CS = 0x65,
+
        HINIC_PORT_CMD_GET_GLOBAL_QPN = 0x66,
 
        HINIC_PORT_CMD_SET_VF_RATE = 0x69,
@@ -125,25 +143,73 @@ enum hinic_port_cmd {
 
        HINIC_PORT_CMD_SET_RQ_IQ_MAP = 0x73,
 
+       HINIC_PORT_CMD_SET_PFC_THD = 0x75,
+
        HINIC_PORT_CMD_LINK_STATUS_REPORT = 0xA0,
 
+       HINIC_PORT_CMD_SET_LOSSLESS_ETH = 0xA3,
+
        HINIC_PORT_CMD_UPDATE_MAC = 0xA4,
 
        HINIC_PORT_CMD_GET_CAP = 0xAA,
 
+       HINIC_PORT_CMD_UP_TC_ADD_FLOW = 0xAF,
+       HINIC_PORT_CMD_UP_TC_DEL_FLOW = 0xB0,
+       HINIC_PORT_CMD_UP_TC_GET_FLOW = 0xB1,
+
+       HINIC_PORT_CMD_UP_TC_FLUSH_TCAM = 0xB2,
+
+       HINIC_PORT_CMD_UP_TC_CTRL_TCAM_BLOCK = 0xB3,
+
+       HINIC_PORT_CMD_UP_TC_ENABLE = 0xB4,
+
+       HINIC_PORT_CMD_UP_TC_GET_TCAM_BLOCK = 0xB5,
+
+       HINIC_PORT_CMD_SET_IPSU_MAC = 0xCB,
+       HINIC_PORT_CMD_GET_IPSU_MAC = 0xCC,
+
+       HINIC_PORT_CMD_SET_XSFP_STATUS = 0xD4,
+
        HINIC_PORT_CMD_GET_LINK_MODE = 0xD9,
 
        HINIC_PORT_CMD_SET_SPEED = 0xDA,
 
        HINIC_PORT_CMD_SET_AUTONEG = 0xDB,
 
+       HINIC_PORT_CMD_CLEAR_QP_RES = 0xDD,
+
+       HINIC_PORT_CMD_SET_SUPER_CQE = 0xDE,
+
+       HINIC_PORT_CMD_SET_VF_COS = 0xDF,
+       HINIC_PORT_CMD_GET_VF_COS = 0xE1,
+
+       HINIC_PORT_CMD_CABLE_PLUG_EVENT = 0xE5,
+
+       HINIC_PORT_CMD_LINK_ERR_EVENT = 0xE6,
+
+       HINIC_PORT_CMD_SET_COS_UP_MAP = 0xE8,
+
+       HINIC_PORT_CMD_RESET_LINK_CFG = 0xEB,
+
        HINIC_PORT_CMD_GET_STD_SFP_INFO = 0xF0,
 
+       HINIC_PORT_CMD_FORCE_PKT_DROP = 0xF3,
+
        HINIC_PORT_CMD_SET_LRO_TIMER = 0xF4,
 
+       HINIC_PORT_CMD_SET_VHD_CFG = 0xF7,
+
+       HINIC_PORT_CMD_SET_LINK_FOLLOW = 0xF8,
+
        HINIC_PORT_CMD_SET_VF_MAX_MIN_RATE = 0xF9,
 
        HINIC_PORT_CMD_GET_SFP_ABS = 0xFB,
+
+       HINIC_PORT_CMD_Q_FILTER = 0xFC,
+
+       HINIC_PORT_CMD_TCAM_FILTER = 0xFE,
+
+       HINIC_PORT_CMD_SET_VLAN_FILTER = 0xFF,
 };
 
 /* cmd of mgmt CPU message for HILINK module */

diff --git a/drivers/net/ethernet/huawei/hinic/hinic_sriov.c b/drivers/net/ethernet/huawei/hinic/hinic_sriov.c
index f7e05b41385bfcdd1bb1755ccd9d32ab49614561..ee357088d0218b7c03d7d3f338ed4fe97686eae9 100644 (file)
--- a/drivers/net/ethernet/huawei/hinic/hinic_sriov.c
+++ b/drivers/net/ethernet/huawei/hinic/hinic_sriov.c
@@ -489,6 +489,24 @@ static struct vf_cmd_check_handle nic_cmd_support_vf[] = {
        {HINIC_PORT_CMD_UPDATE_MAC, hinic_mbox_check_func_id_8B},
        {HINIC_PORT_CMD_GET_CAP, hinic_mbox_check_func_id_8B},
        {HINIC_PORT_CMD_GET_LINK_MODE, hinic_mbox_check_func_id_8B},
+       {HINIC_PORT_CMD_GET_VF_COS, NULL},
+       {HINIC_PORT_CMD_SET_VHD_CFG, hinic_mbox_check_func_id_8B},
+       {HINIC_PORT_CMD_SET_VLAN_FILTER, hinic_mbox_check_func_id_8B},
+       {HINIC_PORT_CMD_Q_FILTER, hinic_mbox_check_func_id_8B},
+       {HINIC_PORT_CMD_TCAM_FILTER, NULL},
+       {HINIC_PORT_CMD_UP_TC_ADD_FLOW, NULL},
+       {HINIC_PORT_CMD_UP_TC_DEL_FLOW, NULL},
+       {HINIC_PORT_CMD_UP_TC_FLUSH_TCAM, hinic_mbox_check_func_id_8B},
+       {HINIC_PORT_CMD_UP_TC_CTRL_TCAM_BLOCK, hinic_mbox_check_func_id_8B},
+       {HINIC_PORT_CMD_UP_TC_ENABLE, hinic_mbox_check_func_id_8B},
+       {HINIC_PORT_CMD_CABLE_PLUG_EVENT, NULL},
+       {HINIC_PORT_CMD_LINK_ERR_EVENT, NULL},
+       {HINIC_PORT_CMD_SET_PORT_STATE, hinic_mbox_check_func_id_8B},
+       {HINIC_PORT_CMD_SET_ETS, NULL},
+       {HINIC_PORT_CMD_SET_ANTI_ATTACK_RATE, NULL},
+       {HINIC_PORT_CMD_RESET_LINK_CFG, hinic_mbox_check_func_id_8B},
+       {HINIC_PORT_CMD_SET_LINK_FOLLOW, NULL},
+       {HINIC_PORT_CMD_CLEAR_QP_RES, NULL},
 };
 
 #define CHECK_IPSU_15BIT       0X8000