drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits

On ICL+, the vertical limits for the transcoders are increased to 8192
and horizontal limits are bumped to 16K so bump up
limits in intel_mode_valid()

v4:
* Increase the hdisplay to 16K (Ville)
v3:
* Supported starting ICL (Ville)
* Use the higher limits from TRANS_VTOTAL register (Ville)
v2:
* Checkpatch warning (Manasi)

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190712202214.3906-1-manasi.d.navare@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a19f8c73f2e0aa1a950222f6a00894460cc56c61..d77fd6ddac49e0380ddb486ae95eead5d371004c 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15839,8 +15839,13 @@ intel_mode_valid(struct drm_device *dev,
                           DRM_MODE_FLAG_CLKDIV2))
                return MODE_BAD;
 
-       if (INTEL_GEN(dev_priv) >= 9 ||
-           IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
+       if (INTEL_GEN(dev_priv) >= 11) {
+               hdisplay_max = 16384;
+               vdisplay_max = 8192;
+               htotal_max = 16384;
+               vtotal_max = 8192;
+       } else if (INTEL_GEN(dev_priv) >= 9 ||
+                  IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
                hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */
                vdisplay_max = 4096;
                htotal_max = 8192;