]> www.infradead.org Git - users/hch/misc.git/commitdiff
iio: adc: ad7606: add gain calibration support
authorAngelo Dureghello <adureghello@baylibre.com>
Fri, 6 Jun 2025 14:19:22 +0000 (16:19 +0200)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Mon, 9 Jun 2025 06:45:37 +0000 (07:45 +0100)
Add gain calibration support, using resistor values set on devicetree,
values to be set accordingly with ADC external RFilter, as explained in
the ad7606c-16 datasheet, rev0, page 37.

Usage example in the fdt yaml documentation.

Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://patch.msgid.link/20250606-wip-bl-ad7606-calibration-v9-7-6e014a1f92a2@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
drivers/iio/adc/ad7606.c
drivers/iio/adc/ad7606.h

index d19682186e7cd73a60541f62adf08d987ba24ec3..d9271894f091a837d29197f7de892c022b7e4152 100644 (file)
 
 #include "ad7606.h"
 
+#define AD7606_CALIB_GAIN_MIN  0
+#define AD7606_CALIB_GAIN_STEP 1024
+#define AD7606_CALIB_GAIN_MAX  (63 * AD7606_CALIB_GAIN_STEP)
+
 /*
  * Scales are computed as 5000/32768 and 10000/32768 respectively,
  * so that when applied to the raw values they provide mV values.
@@ -180,6 +184,7 @@ const struct ad7606_chip_info ad7606b_info = {
        .scale_setup_cb = ad7606_16bit_chan_scale_setup,
        .sw_setup_cb = ad7606b_sw_mode_setup,
        .offload_storagebits = 32,
+       .calib_gain_avail = true,
        .calib_offset_avail = ad7606_calib_offset_avail,
        .calib_phase_avail = ad7606b_calib_phase_avail,
 };
@@ -195,6 +200,7 @@ const struct ad7606_chip_info ad7606c_16_info = {
        .scale_setup_cb = ad7606c_16bit_chan_scale_setup,
        .sw_setup_cb = ad7606b_sw_mode_setup,
        .offload_storagebits = 32,
+       .calib_gain_avail = true,
        .calib_offset_avail = ad7606_calib_offset_avail,
        .calib_phase_avail = ad7606c_calib_phase_avail,
 };
@@ -246,6 +252,7 @@ const struct ad7606_chip_info ad7606c_18_info = {
        .scale_setup_cb = ad7606c_18bit_chan_scale_setup,
        .sw_setup_cb = ad7606b_sw_mode_setup,
        .offload_storagebits = 32,
+       .calib_gain_avail = true,
        .calib_offset_avail = ad7606c_18bit_calib_offset_avail,
        .calib_phase_avail = ad7606c_calib_phase_avail,
 };
@@ -306,6 +313,7 @@ static int ad7606_get_chan_config(struct iio_dev *indio_dev, int ch,
                                  bool *bipolar, bool *differential)
 {
        struct ad7606_state *st = iio_priv(indio_dev);
+       struct ad7606_chan_info *ci;
        unsigned int num_channels = st->chip_info->num_adc_channels;
        struct device *dev = st->dev;
        int ret;
@@ -349,6 +357,14 @@ static int ad7606_get_chan_config(struct iio_dev *indio_dev, int ch,
                        return -EINVAL;
                }
 
+               ci = &st->chan_info[reg - 1];
+
+               ci->r_gain = 0;
+               ret = fwnode_property_read_u32(child, "adi,rfilter-ohms",
+                                              &ci->r_gain);
+               if (ret == 0 && ci->r_gain > AD7606_CALIB_GAIN_MAX)
+                       return -EINVAL;
+
                return 0;
        }
 
@@ -1352,6 +1368,23 @@ static int ad7606b_sw_mode_setup(struct iio_dev *indio_dev)
        return st->bops->sw_mode_config(indio_dev);
 }
 
+static int ad7606_set_gain_calib(struct ad7606_state *st)
+{
+       struct ad7606_chan_info *ci;
+       int i, ret;
+
+       for (i = 0; i < st->chip_info->num_adc_channels; i++) {
+               ci = &st->chan_info[i];
+               ret = st->bops->reg_write(st, AD7606_CALIB_GAIN(i),
+                                         DIV_ROUND_CLOSEST(ci->r_gain,
+                                               AD7606_CALIB_GAIN_STEP));
+               if (ret)
+                       return ret;
+       }
+
+       return 0;
+}
+
 static int ad7606_probe_channels(struct iio_dev *indio_dev)
 {
        struct ad7606_state *st = iio_priv(indio_dev);
@@ -1630,6 +1663,12 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
                st->chip_info->sw_setup_cb(indio_dev);
        }
 
+       if (st->sw_mode_en && st->chip_info->calib_gain_avail) {
+               ret = ad7606_set_gain_calib(st);
+               if (ret)
+                       return ret;
+       }
+
        return devm_iio_device_register(dev, indio_dev);
 }
 EXPORT_SYMBOL_NS_GPL(ad7606_probe, "IIO_AD7606");
index 26db8e3c724f47f68b7d5323f5d1db75b3334540..2951bb731354d64cbec6e8460b3d841a22bb17ec 100644 (file)
@@ -66,6 +66,7 @@ typedef int (*ad7606_sw_setup_cb_t)(struct iio_dev *indio_dev);
  * @init_delay_ms:     required delay in milliseconds for initialization
  *                     after a restart
  * @offload_storagebits: storage bits used by the offload hw implementation
+ * @calib_gain_avail:   chip supports gain calibration
  * @calib_offset_avail: pointer to offset calibration range/limits array
  * @calib_phase_avail:  pointer to phase calibration range/limits array
  */
@@ -81,6 +82,7 @@ struct ad7606_chip_info {
        bool                            os_req_reset;
        unsigned long                   init_delay_ms;
        u8                              offload_storagebits;
+       bool                            calib_gain_avail;
        const int                       *calib_offset_avail;
        const int                       (*calib_phase_avail)[2];
 };
@@ -92,6 +94,8 @@ struct ad7606_chip_info {
  * @range:             voltage range selection, selects which scale to apply
  * @reg_offset:                offset for the register value, to be applied when
  *                     writing the value of 'range' to the register value
+ * @r_gain:            gain resistor value in ohms, to be set to match the
+ *                      external r_filter value
  */
 struct ad7606_chan_info {
 #define AD760X_MAX_SCALES              16
@@ -99,6 +103,7 @@ struct ad7606_chan_info {
        unsigned int                    num_scales;
        unsigned int                    range;
        unsigned int                    reg_offset;
+       unsigned int                    r_gain;
 };
 
 /**