* zynqmp_qspi_setuprxdma - This function sets up the RX DMA operation
  * @xqspi:     xqspi is a pointer to the GQSPI instance.
  */
-static void zynqmp_qspi_setuprxdma(struct zynqmp_qspi *xqspi)
+static int zynqmp_qspi_setuprxdma(struct zynqmp_qspi *xqspi)
 {
        u32 rx_bytes, rx_rem, config_reg;
        dma_addr_t addr;
                zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, config_reg);
                xqspi->mode = GQSPI_MODE_IO;
                xqspi->dma_rx_bytes = 0;
-               return;
+               return 0;
        }
 
        rx_rem = xqspi->bytes_to_receive % 4;
 
        addr = dma_map_single(xqspi->dev, (void *)xqspi->rxbuf,
                              rx_bytes, DMA_FROM_DEVICE);
-       if (dma_mapping_error(xqspi->dev, addr))
+       if (dma_mapping_error(xqspi->dev, addr)) {
                dev_err(xqspi->dev, "ERR:rxdma:memory not mapped\n");
+               return -ENOMEM;
+       }
 
        xqspi->dma_rx_bytes = rx_bytes;
        xqspi->dma_addr = addr;
 
        /* Write the number of bytes to transfer */
        zynqmp_gqspi_write(xqspi, GQSPI_QSPIDMA_DST_SIZE_OFST, rx_bytes);
+
+       return 0;
 }
 
 /**
  * @genfifoentry:      genfifoentry is pointer to the variable in which
  *                     GENFIFO mask is returned to calling function
  */
-static void zynqmp_qspi_read_op(struct zynqmp_qspi *xqspi, u8 rx_nbits,
+static int zynqmp_qspi_read_op(struct zynqmp_qspi *xqspi, u8 rx_nbits,
                                u32 genfifoentry)
 {
-       zynqmp_qspi_setuprxdma(xqspi);
+       int ret;
+
+       ret = zynqmp_qspi_setuprxdma(xqspi);
+       if (ret)
+               return ret;
        zynqmp_qspi_fillgenfifo(xqspi, rx_nbits, genfifoentry);
+
+       return 0;
 }
 
 /**
                        xqspi->rxbuf = (u8 *)op->data.buf.in;
                        xqspi->bytes_to_receive = op->data.nbytes;
                        xqspi->bytes_to_transfer = 0;
-                       zynqmp_qspi_read_op(xqspi, op->data.buswidth,
+                       err = zynqmp_qspi_read_op(xqspi, op->data.buswidth,
                                            genfifoentry);
+                       if (err)
+                               goto return_err;
+
                        zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST,
                                           zynqmp_gqspi_read
                                           (xqspi, GQSPI_CONFIG_OFST) |
                goto clk_dis_all;
        }
 
+       dma_set_mask(&pdev->dev, DMA_BIT_MASK(44));
        ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
        ctlr->num_chipselect = GQSPI_DEFAULT_NUM_CS;
        ctlr->mem_ops = &zynqmp_qspi_mem_ops;