With the help of checkpatch.pl --codespell, fix some typos.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
"bus unit",
"load/store unit",
"northbridge",
- "fixed-issue reoder"
+ "fixed-issue reorder"
};
static const char * const k8threshold[] = {
*********************** Higher 32-bits *****************************
* 63: VALIDERROR, 62: OVERFLOW, 61: UC, 60: Err ENABLE,
* 59: Misc Valid, 58: Addr Valid, 57: PCC, 56: ErrCoreID Valid,
- * 55: TCC, 54: RES, 53: Syndrom Valid, 52: Transparanet,
+ * 55: TCC, 54: RES, 53: Syndrome Valid, 52: Transparent,
* 51: RES, 50: RES, 49: RES, 48: RES,
* 47: RES, 46: CECC, 45: UECC, 44: Deferred,
* 43: Poison, 42: RES, 41: RES, 40: RES,
* banks. The mode is off by default, but can be enabled by setting the
* "MemError Log Enable" * bit in MSR_ERROR_CONTROL (MSR 0x17f).
* The documentation in the August 2012 edition of Intel's Software developer
- * manual has some minor errors because the worng version of table 16-16
+ * manual has some minor errors because the wrong version of table 16-16
* "Intel IMC MC Error Codes for IA32_MCi_MISC (i= 8, 11)" was included.
* Corrections are:
* Bit 62 is the "VALID" bit for the "first-device" bits in MISC and STATUS
free(queue);
}
-/* It should be guranteed that the param is not NULL */
+/* It should be guaranteed that the param is not NULL */
void push(struct link_queue *queue, struct queue_node *node)
{
/* there is no element in the queue */
/*
* Get PCIe AER error source seg/bus/dev/fn and save it into
* BMC OEM SEL, ipmitool raw 0x0a 0x44 is IPMI command-Add SEL
- * entry, please refer IPMI specificaiton chapter 31.6. 0xcd3a
+ * entry, please refer IPMI specification chapter 31.6. 0xcd3a
* is manufactuer ID(ampere),byte 12 is sensor num(CE is 0xBF,
* UE is 0xCA), byte 13~14 is segment number, byte 15 is bus
* number, byte 16[7:3] is device number, byte 16[2:0] is
num += error_count;
err_info += 1;
}
- log(TERM, LOG_INFO, "%d error in cpu core catched\n", num);
+ log(TERM, LOG_INFO, "%d error in cpu core caught\n", num);
return num;
}
struct link_queue *queue = cpu_infos[cpu].ce_queue;
unsigned int tmp;
/*
- * Since we just count all error numbers in setted cycle, we store the time
- * and error numbers from current event to the queue, then everytime we
+ * Since we just count all error numbers in set cycle, we store the time
+ * and error numbers from current event to the queue, then every time we
* calculate the period from beginning time to ending time, if the period
- * exceeds setted cycle, we pop the beginning time and error until the period
+ * exceeds set cycle, we pop the beginning time and error until the period
* from new beginning time to ending time is less than cycle.
*/
while (queue->head && queue->tail && queue->tail->time - queue->head->time > cycle.value) {
if (period >= cycle.val) {
/**
* Since we don't refresh automatically, it is possible that the period
- * between two occurences will be longer than the pre-configured refresh cycle.
+ * between two occurrences will be longer than the pre-configured refresh cycle.
* In this case, we tolerate the frequency of the whole period up to
* the pre-configured threshold.
*/
* Red Black Trees
* (C) 1999 Andrea Arcangeli <andrea@suse.de>
* (C) 2002 David Woodhouse <dwmw2@infradead.org>
- * Taken from the Linux 2.6.30 source with some minor modificatons.
+ * Taken from the Linux 2.6.30 source with some minor modifications.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by