arm64: dts: imx8mq: Add cpu speed grading and all OPPs

Add nvmem-cells reference to cpu and fill the OPP table with all known
OPPs.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 99d7fa2921ec3b8f264f45191425d26852a3bb1a..d31efeda973fb4bbfc4e57da829975c2edcb5d87 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -95,6 +95,8 @@
                        next-level-cache = <&A53_L2>;
                        operating-points-v2 = <&a53_opp_table>;
                        #cooling-cells = <2>;
+                       nvmem-cells = <&cpu_speed_grade>;
+                       nvmem-cell-names = "speed_grade";
                };
 
                A53_1: cpu@1 {
@@ -145,14 +147,32 @@
                opp-800000000 {
                        opp-hz = /bits/ 64 <800000000>;
                        opp-microvolt = <900000>;
+                       /* Industrial only */
+                       opp-supported-hw = <0xf>, <0x4>;
+                       clock-latency-ns = <150000>;
+               };
+
+               opp-1000000000 {
+                       opp-hz = /bits/ 64 <1000000000>;
+                       opp-microvolt = <900000>;
+                       /* Consumer only */
+                       opp-supported-hw = <0xe>, <0x3>;
                        clock-latency-ns = <150000>;
                };
 
                opp-1300000000 {
                        opp-hz = /bits/ 64 <1300000000>;
                        opp-microvolt = <1000000>;
+                       opp-supported-hw = <0xc>, <0x7>;
+                       clock-latency-ns = <150000>;
+               };
+
+               opp-1500000000 {
+                       opp-hz = /bits/ 64 <1500000000>;
+                       opp-microvolt = <1000000>;
+                       /* Consumer only but rely on speed grading */
+                       opp-supported-hw = <0x8>, <0x7>;
                        clock-latency-ns = <150000>;
-                       opp-suspend;
                };
        };
 
@@ -415,6 +435,10 @@
                                clocks = <&clk IMX8MQ_CLK_OCOTP_ROOT>;
                                #address-cells = <1>;
                                #size-cells = <1>;
+
+                               cpu_speed_grade: speed-grade@10 {
+                                       reg = <0x10 4>;
+                               };
                        };
 
                        anatop: syscon@30360000 {