.num_lvds = 1,
 };
 
+static const struct rcar_du_device_info rcar_du_r8a7799x_info = {
+       .gen = 3,
+       .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
+                 | RCAR_DU_FEATURE_EXT_CTRL_REGS
+                 | RCAR_DU_FEATURE_VSP1_SOURCE,
+       .channels_mask = BIT(1) | BIT(0),
+       .routes = {
+               /*
+                * R8A77990 and R8A77995 have one RGB output and two LVDS
+                * outputs.
+                */
+               [RCAR_DU_OUTPUT_DPAD0] = {
+                       .possible_crtcs = BIT(0) | BIT(1),
+                       .port = 0,
+               },
+               [RCAR_DU_OUTPUT_LVDS0] = {
+                       .possible_crtcs = BIT(0),
+                       .port = 1,
+               },
+               [RCAR_DU_OUTPUT_LVDS1] = {
+                       .possible_crtcs = BIT(1),
+                       .port = 2,
+               },
+       },
+       .num_lvds = 2,
+       .lvds_clk_mask =  BIT(1) | BIT(0),
+};
+
 static const struct of_device_id rcar_du_of_table[] = {
        { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info },
        { .compatible = "renesas,du-r8a7745", .data = &rzg1_du_r8a7745_info },
        { .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info },
        { .compatible = "renesas,du-r8a77965", .data = &rcar_du_r8a77965_info },
        { .compatible = "renesas,du-r8a77970", .data = &rcar_du_r8a77970_info },
+       { .compatible = "renesas,du-r8a77990", .data = &rcar_du_r8a7799x_info },
+       { .compatible = "renesas,du-r8a77995", .data = &rcar_du_r8a7799x_info },
        { }
 };