amdgpu_amdkfd_device_probe(adev);
 
        if (amdgpu_sriov_vf(adev)) {
+               /* handle vbios stuff prior full access mode for new handshake */
+               if (adev->virt.req_init_data_ver == 1) {
+                       if (!amdgpu_get_bios(adev)) {
+                               DRM_ERROR("failed to get vbios\n");
+                               return -EINVAL;
+                       }
+
+                       r = amdgpu_atombios_init(adev);
+                       if (r) {
+                               dev_err(adev->dev, "amdgpu_atombios_init failed\n");
+                               amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ATOMBIOS_INIT_FAIL, 0, 0);
+                               return r;
+                       }
+               }
+
                r = amdgpu_virt_request_full_gpu(adev, true);
                if (r)
                        return -EAGAIN;
                }
                /* get the vbios after the asic_funcs are set up */
                if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON) {
+                       /* skip vbios handling for new handshake */
+                       if (amdgpu_sriov_vf(adev) && adev->virt.req_init_data_ver == 1)
+                               continue;
+
                        /* Read BIOS */
                        if (!amdgpu_get_bios(adev))
                                return -EINVAL;
 
 {
        int r;
 
-       /* Set IP register base before any HW register access */
-       r = nv_reg_base_init(adev);
-       if (r)
-               return r;
-
        adev->nbio.funcs = &nbio_v2_3_funcs;
        adev->nbio.hdp_flush_reg = &nbio_v2_3_hdp_flush_reg;
 
-       if (amdgpu_sriov_vf(adev))
+       if (amdgpu_sriov_vf(adev)) {
                adev->virt.ops = &xgpu_nv_virt_ops;
+               /* try send GPU_INIT_DATA request to host */
+               amdgpu_virt_request_init_data(adev);
+       }
+
+       /* Set IP register base before any HW register access */
+       r = nv_reg_base_init(adev);
+       if (r)
+               return r;
 
        switch (adev->asic_type) {
        case CHIP_NAVI10: