]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
staging: rtl8192e: Remove priv->rf_chip in _rtl92e_phy_rf_write
authorPhilipp Hortmann <philipp.g.hortmann@gmail.com>
Sat, 25 Mar 2023 08:35:28 +0000 (09:35 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 25 Mar 2023 08:52:09 +0000 (09:52 +0100)
priv->rf_chip is initialized to RF_8256 and never changed. Remove
conditions in function _rtl92e_phy_rf_write as those are dead code.

Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/77628b7ecade212401d7da5e3c0b79f8ef55b5c1.1679732276.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c

index c4fd412cf3d6d29f1da92806011dc402f621867f..acd1e1869d7841a10b6ada181d04b50576b2290a 100644 (file)
@@ -129,24 +129,22 @@ static void _rtl92e_phy_rf_write(struct net_device *dev,
        struct bb_reg_definition *pPhyReg = &priv->phy_reg_def[eRFPath];
 
        Offset &= 0x3f;
-       if (priv->rf_chip == RF_8256) {
-               rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
 
-               if (Offset >= 31) {
-                       priv->rf_reg_0value[eRFPath] |= 0x140;
-                       rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
-                                         bMaskDWord,
-                                         (priv->rf_reg_0value[eRFPath] << 16));
-                       NewOffset = Offset - 30;
-               } else if (Offset >= 16) {
-                       priv->rf_reg_0value[eRFPath] |= 0x100;
-                       priv->rf_reg_0value[eRFPath] &= (~0x40);
-                       rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
-                                         bMaskDWord,
-                                         (priv->rf_reg_0value[eRFPath] << 16));
-                       NewOffset = Offset - 15;
-               } else
-                       NewOffset = Offset;
+       rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
+
+       if (Offset >= 31) {
+               priv->rf_reg_0value[eRFPath] |= 0x140;
+               rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
+                                 bMaskDWord,
+                                 (priv->rf_reg_0value[eRFPath] << 16));
+               NewOffset = Offset - 30;
+       } else if (Offset >= 16) {
+               priv->rf_reg_0value[eRFPath] |= 0x100;
+               priv->rf_reg_0value[eRFPath] &= (~0x40);
+               rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
+                                 bMaskDWord,
+                                 (priv->rf_reg_0value[eRFPath] << 16));
+               NewOffset = Offset - 15;
        } else {
                NewOffset = Offset;
        }
@@ -158,15 +156,13 @@ static void _rtl92e_phy_rf_write(struct net_device *dev,
        if (Offset == 0x0)
                priv->rf_reg_0value[eRFPath] = Data;
 
-       if (priv->rf_chip == RF_8256) {
-               if (Offset != 0) {
-                       priv->rf_reg_0value[eRFPath] &= 0xebf;
-                       rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
-                                         bMaskDWord,
-                                         (priv->rf_reg_0value[eRFPath] << 16));
-               }
-               rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
+       if (Offset != 0) {
+               priv->rf_reg_0value[eRFPath] &= 0xebf;
+               rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
+                                 bMaskDWord,
+                                 (priv->rf_reg_0value[eRFPath] << 16));
        }
+       rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
 }
 
 void rtl92e_set_rf_reg(struct net_device *dev, enum rf90_radio_path eRFPath,