drm/i915: Enable HDMI on DDI-E

DDI-E doesn't have the correspondent GMBUS pin.

We rely on VBT to tell us which one it being used instead.

The DVI/HDMI on shared port couldn't exist.

This patch isn't tested without hardware wchich has HDMI
on DDI-E.

v2: fix trailing whitespace
v3: MISSING_CASE take place of BUG()

Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 089459b39771195ae91d197fd9da9d81fe174ac4..9b9bd2e34c132097ced218a4faf97a579c13c9e3 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1416,6 +1416,10 @@ enum modeset_restore {
 #define DP_AUX_C 0x20
 #define DP_AUX_D 0x30
 
+#define DDC_PIN_B  0x05
+#define DDC_PIN_C  0x04
+#define DDC_PIN_D  0x06
+
 struct ddi_vbt_port_info {
        /*
         * This is an index in the HDMI/DVI DDI buffer translation table.
@@ -1430,6 +1434,7 @@ struct ddi_vbt_port_info {
        uint8_t supports_dp:1;
 
        uint8_t alternate_aux_channel;
+       uint8_t alternate_ddc_pin;
 
        uint8_t dp_boost_level;
        uint8_t hdmi_boost_level;

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index be83b77aa018b9c3c5e1d4843462bd03b89f6be7..313b5a73c6b48354c010740cd476ed809fa28437 100644 (file)
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -905,7 +905,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
        uint8_t hdmi_level_shift;
        int i, j;
        bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
-       uint8_t aux_channel;
+       uint8_t aux_channel, ddc_pin;
        /* Each DDI port can have more than one value on the "DVO Port" field,
         * so look for all the possible values for each port and abort if more
         * than one is found. */
@@ -939,6 +939,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
                return;
 
        aux_channel = child->raw[25];
+       ddc_pin = child->common.ddc_pin;
 
        is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
        is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
@@ -970,11 +971,27 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
                DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
 
        if (is_dvi) {
-               if (child->common.ddc_pin == 0x05 && port != PORT_B)
+               if (port == PORT_E) {
+                       info->alternate_ddc_pin = ddc_pin;
+                       /* if DDIE share ddc pin with other port, then
+                        * dvi/hdmi couldn't exist on the shared port.
+                        * Otherwise they share the same ddc bin and system
+                        * couldn't communicate with them seperately. */
+                       if (ddc_pin == DDC_PIN_B) {
+                               dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0;
+                               dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0;
+                       } else if (ddc_pin == DDC_PIN_C) {
+                               dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0;
+                               dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0;
+                       } else if (ddc_pin == DDC_PIN_D) {
+                               dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0;
+                               dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0;
+                       }
+               } else if (ddc_pin == DDC_PIN_B && port != PORT_B)
                        DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
-               if (child->common.ddc_pin == 0x04 && port != PORT_C)
+               else if (ddc_pin == DDC_PIN_C && port != PORT_C)
                        DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
-               if (child->common.ddc_pin == 0x06 && port != PORT_D)
+               else if (ddc_pin == DDC_PIN_D && port != PORT_D)
                        DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
        }
 

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 51cbea8247fe9b2cfc6987e6dec114b06d09cc00..dcd336bcdfe750037901f87a6fb5e2c78c57b17c 100644 (file)
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1958,6 +1958,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
        struct drm_device *dev = intel_encoder->base.dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
        enum port port = intel_dig_port->port;
+       uint8_t alternate_ddc_pin;
 
        drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
                           DRM_MODE_CONNECTOR_HDMIA);
@@ -1991,6 +1992,26 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
                        intel_hdmi->ddc_bus = GMBUS_PIN_DPD;
                intel_encoder->hpd_pin = HPD_PORT_D;
                break;
+       case PORT_E:
+               /* On SKL PORT E doesn't have seperate GMBUS pin
+                *  We rely on VBT to set a proper alternate GMBUS pin. */
+               alternate_ddc_pin =
+                       dev_priv->vbt.ddi_port_info[PORT_E].alternate_ddc_pin;
+               switch (alternate_ddc_pin) {
+               case DDC_PIN_B:
+                       intel_hdmi->ddc_bus = GMBUS_PIN_DPB;
+                       break;
+               case DDC_PIN_C:
+                       intel_hdmi->ddc_bus = GMBUS_PIN_DPC;
+                       break;
+               case DDC_PIN_D:
+                       intel_hdmi->ddc_bus = GMBUS_PIN_DPD;
+                       break;
+               default:
+                       MISSING_CASE(alternate_ddc_pin);
+               }
+               intel_encoder->hpd_pin = HPD_PORT_E;
+               break;
        case PORT_A:
                intel_encoder->hpd_pin = HPD_PORT_A;
                /* Internal port only for eDP. */