The documentation for clk_get_rate() in include/linux/clk.h states the
function's result is valid only for a clock source that has been
enabled. However, the Rockchip PWM driver uses this function in two places
to query the rate of a clock without first ensuring it is enabled.
Fix this by modifying rockchip_pwm_get_state() and rockchip_pwm_apply() so
they enable a device's PWM clock before querying its rate (in the latter
case, the querying is actually done in rockchip_pwm_config()) and disable
the clock again before returning.
Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
        if (ret)
                return;
 
+       ret = clk_enable(pc->clk);
+       if (ret)
+               return;
+
        clk_rate = clk_get_rate(pc->clk);
 
        tmp = readl_relaxed(pc->base + pc->data->regs.period);
        else
                state->polarity = PWM_POLARITY_NORMAL;
 
+       clk_disable(pc->clk);
        clk_disable(pc->pclk);
 }
 
        if (ret)
                return ret;
 
+       ret = clk_enable(pc->clk);
+       if (ret)
+               return ret;
+
        pwm_get_state(pwm, &curstate);
        enabled = curstate.enabled;
 
        }
 
 out:
+       clk_disable(pc->clk);
        clk_disable(pc->pclk);
 
        return ret;