drm/amdgpu/soc15: add PCI reset support

Use generic PCI reset for GPU reset if the user specifies
PCI reset as the reset mechanism.  This should in general
only be used for validation.

Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 2396be16c28ed232ca18359f230de83b499aa744..e865495d3ead163f6d9b624b28b79ce49432d94a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -479,7 +479,8 @@ soc15_asic_reset_method(struct amdgpu_device *adev)
 
        if (amdgpu_reset_method == AMD_RESET_METHOD_MODE1 ||
            amdgpu_reset_method == AMD_RESET_METHOD_MODE2 ||
-               amdgpu_reset_method == AMD_RESET_METHOD_BACO)
+           amdgpu_reset_method == AMD_RESET_METHOD_BACO ||
+           amdgpu_reset_method == AMD_RESET_METHOD_PCI)
                return amdgpu_reset_method;
 
        if (amdgpu_reset_method != -1)
@@ -524,15 +525,18 @@ static int soc15_asic_reset(struct amdgpu_device *adev)
                return 0;
 
        switch (soc15_asic_reset_method(adev)) {
-               case AMD_RESET_METHOD_BACO:
-                       dev_info(adev->dev, "BACO reset\n");
-                       return soc15_asic_baco_reset(adev);
-               case AMD_RESET_METHOD_MODE2:
-                       dev_info(adev->dev, "MODE2 reset\n");
-                       return amdgpu_dpm_mode2_reset(adev);
-               default:
-                       dev_info(adev->dev, "MODE1 reset\n");
-                       return soc15_asic_mode1_reset(adev);
+       case AMD_RESET_METHOD_PCI:
+               dev_info(adev->dev, "PCI reset\n");
+               return amdgpu_device_pci_reset(adev);
+       case AMD_RESET_METHOD_BACO:
+               dev_info(adev->dev, "BACO reset\n");
+               return soc15_asic_baco_reset(adev);
+       case AMD_RESET_METHOD_MODE2:
+               dev_info(adev->dev, "MODE2 reset\n");
+               return amdgpu_dpm_mode2_reset(adev);
+       default:
+               dev_info(adev->dev, "MODE1 reset\n");
+               return soc15_asic_mode1_reset(adev);
        }
 }