.init_irq       = ks8695_init_irq,
        .init_machine   = acs5k_init,
        .timer          = &ks8695_timer,
+       .restart        = ks8695_restart,
 MACHINE_END
 
        .init_irq       = ks8695_init_irq,
        .init_machine   = dsm320_init,
        .timer          = &ks8695_timer,
+       .restart        = ks8695_restart,
 MACHINE_END
 
        .init_irq       = ks8695_init_irq,
        .init_machine   = micrel_init,
        .timer          = &ks8695_timer,
+       .restart        = ks8695_restart,
 MACHINE_END
 
 
 extern __init void ks8695_map_io(void);
 extern __init void ks8695_init_irq(void);
+extern void ks8695_restart(char, const char *);
 extern struct sys_timer ks8695_timer;
 
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/regs-timer.h>
-
 static void arch_idle(void)
 {
        /*
 
 static void arch_reset(char mode, const char *cmd)
 {
-       unsigned int reg;
-
-       if (mode == 's')
-               soft_restart(0);
-
-       /* disable timer0 */
-       reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
-       __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
-
-       /* enable watchdog mode */
-       __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
-
-       /* re-enable timer0 */
-       __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
 }
 
 #endif
 
        .offset         = ks8695_gettimeoffset,
        .resume         = ks8695_timer_setup,
 };
+
+void ks8695_restart(char mode, const char *cmd)
+{
+       unsigned int reg;
+
+       if (mode == 's')
+               soft_restart(0);
+
+       /* disable timer0 */
+       reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
+       __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
+
+       /* enable watchdog mode */
+       __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
+
+       /* re-enable timer0 */
+       __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
+}