It was branching to the cleanup part of the non-bolted handler,
which would have been bad if there were any chips with tlbsrx.
that use the bolted handler.
Signed-off-by: Scott Wood <scottwood@freescale.com>
         */
        PPC_TLBSRX_DOT(0,R16)
        ldx     r14,r14,r15             /* grab pgd entry */
-       beq     normal_tlb_miss_done    /* tlb exists already, bail */
+       beq     tlb_miss_done_bolted    /* tlb exists already, bail */
 MMU_FTR_SECTION_ELSE
        ldx     r14,r14,r15             /* grab pgd entry */
 ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBRSRV)
        mtspr   SPRN_MAS7_MAS3,r15
        tlbwe
 
+tlb_miss_done_bolted:
        TLB_MISS_STATS_X(MMSTAT_TLB_MISS_NORM_OK)
        tlb_epilog_bolted
        rfi