VDDIO-supply = <®_3p3v>;
        };
 
-       pmic: pf0100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
                interrupt-parent = <&gpio5>;
 
                     &pinctrl_pfuze>;
        status = "okay";
 
-       pmic: pfuze100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
                interrupt-parent = <&gpio3>;
 
        pinctrl-0 = <&pinctrl_i2c2>;
        status = "okay";
 
-       pmic: pfuze100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c2_novena>;
        status = "okay";
 
-       pmic: pfuze100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c2>;
        status = "okay";
 
-       pmic: pfuze100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c2>;
        status = "okay";
 
-       pmic: pfuze100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c2>;
        status = "okay";
 
-       pmic: pfuze100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
 
 
                };
        };
 
-       pmic: pfuze100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c3>;
        status = "okay";
 
-       pmic: pfuze100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c1>;
        status = "okay";
 
-       pmic: pfuze100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c1>;
        status = "okay";
 
-       pmic: pfuze100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c1>;
        status = "okay";
 
-       pmic: pfuze100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze200";
                reg = <0x08>;
 
 
                reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
        };
 
-       pmic: pfuze100@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze200";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c1>;
        status = "okay";
 
-       pmic: pfuze3000@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze3000";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c1>;
        status = "okay";
 
-       pmic: pfuze3000@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze3000";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c4>;
        status = "okay";
 
-       pmic: pfuze3000@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze3000";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c1>;
        status = "okay";
 
-       pmic: pfuze3000@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze3000";
                reg = <0x08>;
 
 
        pinctrl-0 = <&pinctrl_i2c1>;
        status = "okay";
 
-       pmic: pfuze3000@8 {
+       pmic: pmic@8 {
                compatible = "fsl,pfuze3000";
                reg = <0x08>;