return 0;
 }
 
+static u8 tgl_calc_voltage_level(int cdclk)
+{
+       if (cdclk > 556800)
+               return 3;
+       else if (cdclk > 326400)
+               return 2;
+       else if (cdclk > 312000)
+               return 1;
+       else
+               return 0;
+}
+
 static void cnl_readout_refclk(struct drm_i915_private *dev_priv,
                               struct intel_cdclk_config *cdclk_config)
 {
  */
 void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv)
 {
-       if (IS_ELKHARTLAKE(dev_priv)) {
+       if (INTEL_GEN(dev_priv) >= 12) {
+               dev_priv->display.set_cdclk = bxt_set_cdclk;
+               dev_priv->display.modeset_calc_cdclk = bxt_modeset_calc_cdclk;
+               dev_priv->display.calc_voltage_level = tgl_calc_voltage_level;
+               dev_priv->cdclk.table = icl_cdclk_table;
+       } else if (IS_ELKHARTLAKE(dev_priv)) {
                dev_priv->display.set_cdclk = bxt_set_cdclk;
                dev_priv->display.modeset_calc_cdclk = bxt_modeset_calc_cdclk;
                dev_priv->display.calc_voltage_level = ehl_calc_voltage_level;
 
 void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
                                         struct intel_crtc_state *crtc_state)
 {
-       if (IS_ELKHARTLAKE(dev_priv) && crtc_state->port_clock > 594000)
+       if (INTEL_GEN(dev_priv) >= 12 && crtc_state->port_clock > 594000)
+               crtc_state->min_voltage_level = 2;
+       else if (IS_ELKHARTLAKE(dev_priv) && crtc_state->port_clock > 594000)
                crtc_state->min_voltage_level = 3;
        else if (INTEL_GEN(dev_priv) >= 11 && crtc_state->port_clock > 594000)
                crtc_state->min_voltage_level = 1;