drm/msm/dpu: deduplicate some (most) of SSPP sub-blocks

As we have dropped the variadic parts of SSPP sub-blocks declarations,
deduplicate them now, reducing memory cruft.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/570112/
Link: https://lore.kernel.org/r/20231201234234.2065610-7-dmitry.baryshkov@linaro.org

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
index 4dcc9f804ac12385606c7b0152a48c6c3cad9820..1d3e9666c7411e37a058b42756673ea88c805ffd 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
@@ -69,7 +69,7 @@ static const struct dpu_sspp_cfg msm8998_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1ac,
                .features = VIG_MSM8998_MASK,
-               .sblk = &msm8998_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_1_2,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -77,7 +77,7 @@ static const struct dpu_sspp_cfg msm8998_sspp[] = {
                .name = "sspp_1", .id = SSPP_VIG1,
                .base = 0x6000, .len = 0x1ac,
                .features = VIG_MSM8998_MASK,
-               .sblk = &msm8998_vig_sblk_1,
+               .sblk = &dpu_vig_sblk_qseed3_1_2,
                .xin_id = 4,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG1,
@@ -85,7 +85,7 @@ static const struct dpu_sspp_cfg msm8998_sspp[] = {
                .name = "sspp_2", .id = SSPP_VIG2,
                .base = 0x8000, .len = 0x1ac,
                .features = VIG_MSM8998_MASK,
-               .sblk = &msm8998_vig_sblk_2,
+               .sblk = &dpu_vig_sblk_qseed3_1_2,
                .xin_id = 8,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG2,
@@ -93,7 +93,7 @@ static const struct dpu_sspp_cfg msm8998_sspp[] = {
                .name = "sspp_3", .id = SSPP_VIG3,
                .base = 0xa000, .len = 0x1ac,
                .features = VIG_MSM8998_MASK,
-               .sblk = &msm8998_vig_sblk_3,
+               .sblk = &dpu_vig_sblk_qseed3_1_2,
                .xin_id = 12,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG3,
@@ -101,7 +101,7 @@ static const struct dpu_sspp_cfg msm8998_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1ac,
                .features = DMA_MSM8998_MASK,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
@@ -109,7 +109,7 @@ static const struct dpu_sspp_cfg msm8998_sspp[] = {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x1ac,
                .features = DMA_MSM8998_MASK,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,
@@ -117,7 +117,7 @@ static const struct dpu_sspp_cfg msm8998_sspp[] = {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x1ac,
                .features = DMA_CURSOR_MSM8998_MASK,
-               .sblk = &sdm845_dma_sblk_2,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA2,
@@ -125,7 +125,7 @@ static const struct dpu_sspp_cfg msm8998_sspp[] = {
                .name = "sspp_11", .id = SSPP_DMA3,
                .base = 0x2a000, .len = 0x1ac,
                .features = DMA_CURSOR_MSM8998_MASK,
-               .sblk = &sdm845_dma_sblk_3,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 13,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA3,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
index 03159d359500f9561504db70d04d1e996e3b9246..7a23389a57327273ae313cf0ce801ab0f6e384af 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
@@ -67,7 +67,7 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1c8,
                .features = VIG_SDM845_MASK_SDMA,
-               .sblk = &sdm845_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_1_3,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = {
                .name = "sspp_1", .id = SSPP_VIG1,
                .base = 0x6000, .len = 0x1c8,
                .features = VIG_SDM845_MASK_SDMA,
-               .sblk = &sdm845_vig_sblk_1,
+               .sblk = &dpu_vig_sblk_qseed3_1_3,
                .xin_id = 4,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG1,
@@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = {
                .name = "sspp_2", .id = SSPP_VIG2,
                .base = 0x8000, .len = 0x1c8,
                .features = VIG_SDM845_MASK_SDMA,
-               .sblk = &sdm845_vig_sblk_2,
+               .sblk = &dpu_vig_sblk_qseed3_1_3,
                .xin_id = 8,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG2,
@@ -91,7 +91,7 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = {
                .name = "sspp_3", .id = SSPP_VIG3,
                .base = 0xa000, .len = 0x1c8,
                .features = VIG_SDM845_MASK_SDMA,
-               .sblk = &sdm845_vig_sblk_3,
+               .sblk = &dpu_vig_sblk_qseed3_1_3,
                .xin_id = 12,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG3,
@@ -99,7 +99,7 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1c8,
                .features = DMA_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
@@ -107,7 +107,7 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x1c8,
                .features = DMA_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,
@@ -115,7 +115,7 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x1c8,
                .features = DMA_CURSOR_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_2,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA2,
@@ -123,7 +123,7 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = {
                .name = "sspp_11", .id = SSPP_DMA3,
                .base = 0x2a000, .len = 0x1c8,
                .features = DMA_CURSOR_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_3,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 13,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA3,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
index 4184c18d81f38df25405da691249c8dec5456b4d..145f3d5953a30de0c847bc7800f3661a33c67ac7 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
@@ -76,7 +76,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1f0,
                .features = VIG_SDM845_MASK,
-               .sblk = &sm8150_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_1_4,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -84,7 +84,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
                .name = "sspp_1", .id = SSPP_VIG1,
                .base = 0x6000, .len = 0x1f0,
                .features = VIG_SDM845_MASK,
-               .sblk = &sm8150_vig_sblk_1,
+               .sblk = &dpu_vig_sblk_qseed3_1_4,
                .xin_id = 4,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG1,
@@ -92,7 +92,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
                .name = "sspp_2", .id = SSPP_VIG2,
                .base = 0x8000, .len = 0x1f0,
                .features = VIG_SDM845_MASK,
-               .sblk = &sm8150_vig_sblk_2,
+               .sblk = &dpu_vig_sblk_qseed3_1_4,
                .xin_id = 8,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG2,
@@ -100,7 +100,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
                .name = "sspp_3", .id = SSPP_VIG3,
                .base = 0xa000, .len = 0x1f0,
                .features = VIG_SDM845_MASK,
-               .sblk = &sm8150_vig_sblk_3,
+               .sblk = &dpu_vig_sblk_qseed3_1_4,
                .xin_id = 12,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG3,
@@ -108,7 +108,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1f0,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
@@ -116,7 +116,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x1f0,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,
@@ -124,7 +124,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x1f0,
                .features = DMA_CURSOR_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_2,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA2,
@@ -132,7 +132,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
                .name = "sspp_11", .id = SSPP_DMA3,
                .base = 0x2a000, .len = 0x1f0,
                .features = DMA_CURSOR_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_3,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 13,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA3,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
index 83fb7312bc9790b9a72e99443cc3beada25005ea..9e3bec8bc1218834ce030180e894a41cb5c82989 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
@@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1f0,
                .features = VIG_SDM845_MASK,
-               .sblk = &sm8150_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_1_4,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
                .name = "sspp_1", .id = SSPP_VIG1,
                .base = 0x6000, .len = 0x1f0,
                .features = VIG_SDM845_MASK,
-               .sblk = &sm8150_vig_sblk_1,
+               .sblk = &dpu_vig_sblk_qseed3_1_4,
                .xin_id = 4,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG1,
@@ -91,7 +91,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
                .name = "sspp_2", .id = SSPP_VIG2,
                .base = 0x8000, .len = 0x1f0,
                .features = VIG_SDM845_MASK,
-               .sblk = &sm8150_vig_sblk_2,
+               .sblk = &dpu_vig_sblk_qseed3_1_4,
                .xin_id = 8,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG2,
@@ -99,7 +99,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
                .name = "sspp_3", .id = SSPP_VIG3,
                .base = 0xa000, .len = 0x1f0,
                .features = VIG_SDM845_MASK,
-               .sblk = &sm8150_vig_sblk_3,
+               .sblk = &dpu_vig_sblk_qseed3_1_4,
                .xin_id = 12,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG3,
@@ -107,7 +107,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1f0,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
@@ -115,7 +115,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x1f0,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,
@@ -123,7 +123,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x1f0,
                .features = DMA_CURSOR_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_2,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA2,
@@ -131,7 +131,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
                .name = "sspp_11", .id = SSPP_DMA3,
                .base = 0x2a000, .len = 0x1f0,
                .features = DMA_CURSOR_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_3,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 13,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA3,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
index cec7af6667dc92991681a5bb6b3570d89dcd2f6a..3969f2925d89bcbc83efab2cc7989f101a45257b 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
@@ -69,7 +69,7 @@ static const struct dpu_sspp_cfg sm6125_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1f0,
                .features = VIG_SM6125_MASK,
-               .sblk = &sm6125_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_2_4,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -77,7 +77,7 @@ static const struct dpu_sspp_cfg sm6125_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1f0,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
@@ -85,7 +85,7 @@ static const struct dpu_sspp_cfg sm6125_sspp[] = {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x1f0,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
index 885a2bec825845979774bd9c2f5ac3395675f81a..f751d63845d1fbdb28a344a061bfb60d64bebda4 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
@@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sm8250_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1f8,
                .features = VIG_SC7180_MASK_SDMA,
-               .sblk = &sm8250_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sm8250_sspp[] = {
                .name = "sspp_1", .id = SSPP_VIG1,
                .base = 0x6000, .len = 0x1f8,
                .features = VIG_SC7180_MASK_SDMA,
-               .sblk = &sm8250_vig_sblk_1,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 4,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG1,
@@ -91,7 +91,7 @@ static const struct dpu_sspp_cfg sm8250_sspp[] = {
                .name = "sspp_2", .id = SSPP_VIG2,
                .base = 0x8000, .len = 0x1f8,
                .features = VIG_SC7180_MASK_SDMA,
-               .sblk = &sm8250_vig_sblk_2,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 8,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG2,
@@ -99,7 +99,7 @@ static const struct dpu_sspp_cfg sm8250_sspp[] = {
                .name = "sspp_3", .id = SSPP_VIG3,
                .base = 0xa000, .len = 0x1f8,
                .features = VIG_SC7180_MASK_SDMA,
-               .sblk = &sm8250_vig_sblk_3,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 12,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG3,
@@ -107,7 +107,7 @@ static const struct dpu_sspp_cfg sm8250_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1f8,
                .features = DMA_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
@@ -115,7 +115,7 @@ static const struct dpu_sspp_cfg sm8250_sspp[] = {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x1f8,
                .features = DMA_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,
@@ -123,7 +123,7 @@ static const struct dpu_sspp_cfg sm8250_sspp[] = {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x1f8,
                .features = DMA_CURSOR_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_2,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA2,
@@ -131,7 +131,7 @@ static const struct dpu_sspp_cfg sm8250_sspp[] = {
                .name = "sspp_11", .id = SSPP_DMA3,
                .base = 0x2a000, .len = 0x1f8,
                .features = DMA_CURSOR_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_3,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 13,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA3,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
index c9d1f1292b3daea8e336094d780f27806822ce70..7627f16c5b2d823b73b03b11f94f62d7f32d9f56 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
@@ -52,7 +52,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1f8,
                .features = VIG_SC7180_MASK,
-               .sblk = &sc7180_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -60,7 +60,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1f8,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
@@ -68,7 +68,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x1f8,
                .features = DMA_CURSOR_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,
@@ -76,7 +76,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x1f8,
                .features = DMA_CURSOR_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_2,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA2,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
index 320b8f23364f138498f05dff46ff047c3b2605e3..7aefdb7eb49484655d638cd73c6f3267d2f5773f 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
@@ -39,7 +39,7 @@ static const struct dpu_sspp_cfg sm6115_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1f8,
                .features = VIG_SC7180_MASK,
-               .sblk = &sm6115_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -47,7 +47,7 @@ static const struct dpu_sspp_cfg sm6115_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1f8,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
index 6c6bc754aeb7055179c0fbd6ea16de5f579b32f2..99df9816f1714b7499b07de4ee863191030bc8bb 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
@@ -59,7 +59,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1f8,
                .features = VIG_SC7180_MASK,
-               .sblk = &sc7180_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -67,7 +67,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1f8,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
@@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x1f8,
                .features = DMA_CURSOR_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,
@@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x1f8,
                .features = DMA_CURSOR_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_2,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA2,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
index fb36fba5171cf53440c65f6793a479cfb455db08..3cbb2fe8aba24c7b9db6bb61ff4c48f34db48bf4 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
@@ -39,7 +39,7 @@ static const struct dpu_sspp_cfg qcm2290_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1f8,
                .features = VIG_QCM2290_MASK,
-               .sblk = &qcm2290_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_noscale,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -47,7 +47,7 @@ static const struct dpu_sspp_cfg qcm2290_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1f8,
                .features = DMA_SDM845_MASK,
-               .sblk = &qcm2290_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
index 77703f663e2594d7f0df8c149e854312b3033481..2de304d97c9b84227edfa67ef23a4722300a74f1 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
@@ -40,7 +40,7 @@ static const struct dpu_sspp_cfg sm6375_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1f8,
                .features = VIG_SC7180_MASK,
-               .sblk = &sm6115_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -48,7 +48,7 @@ static const struct dpu_sspp_cfg sm6375_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1f8,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
index 03181ba891d59199d4ab9e67ac3afdd109075ea3..ad6eb28ead49a317927751c78abf3dd391d73162 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
@@ -74,7 +74,7 @@ static const struct dpu_sspp_cfg sm8350_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1f8,
                .features = VIG_SC7180_MASK_SDMA,
-               .sblk = &sm8250_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -82,7 +82,7 @@ static const struct dpu_sspp_cfg sm8350_sspp[] = {
                .name = "sspp_1", .id = SSPP_VIG1,
                .base = 0x6000, .len = 0x1f8,
                .features = VIG_SC7180_MASK_SDMA,
-               .sblk = &sm8250_vig_sblk_1,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 4,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG1,
@@ -90,7 +90,7 @@ static const struct dpu_sspp_cfg sm8350_sspp[] = {
                .name = "sspp_2", .id = SSPP_VIG2,
                .base = 0x8000, .len = 0x1f8,
                .features = VIG_SC7180_MASK_SDMA,
-               .sblk = &sm8250_vig_sblk_2,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 8,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG2,
@@ -98,7 +98,7 @@ static const struct dpu_sspp_cfg sm8350_sspp[] = {
                .name = "sspp_3", .id = SSPP_VIG3,
                .base = 0xa000, .len = 0x1f8,
                .features = VIG_SC7180_MASK_SDMA,
-               .sblk = &sm8250_vig_sblk_3,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 12,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG3,
@@ -106,7 +106,7 @@ static const struct dpu_sspp_cfg sm8350_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1f8,
                .features = DMA_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
@@ -114,7 +114,7 @@ static const struct dpu_sspp_cfg sm8350_sspp[] = {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x1f8,
                .features = DMA_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,
@@ -122,7 +122,7 @@ static const struct dpu_sspp_cfg sm8350_sspp[] = {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x1f8,
                .features = DMA_CURSOR_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_2,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA2,
@@ -130,7 +130,7 @@ static const struct dpu_sspp_cfg sm8350_sspp[] = {
                .name = "sspp_11", .id = SSPP_DMA3,
                .base = 0x2a000, .len = 0x1f8,
                .features = DMA_CURSOR_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_3,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 13,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA3,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
index 42bb47181ba1ca32f6a083e007117dfd8a3d6b7d..93564e9e5fa5586bbfd68aeca276ed49fc96d87b 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
@@ -57,7 +57,7 @@ static const struct dpu_sspp_cfg sc7280_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1f8,
                .features = VIG_SC7280_MASK_SDMA,
-               .sblk = &sc7280_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_3_0_rot_v2,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -65,7 +65,7 @@ static const struct dpu_sspp_cfg sc7280_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1f8,
                .features = DMA_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
@@ -73,7 +73,7 @@ static const struct dpu_sspp_cfg sc7280_sspp[] = {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x1f8,
                .features = DMA_CURSOR_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,
@@ -81,7 +81,7 @@ static const struct dpu_sspp_cfg sc7280_sspp[] = {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x1f8,
                .features = DMA_CURSOR_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_2,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA2,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
index 6da122df0b8888359683559bbb5aeed9057f7da6..c2f1acd4352413e099e6fc1b9f16634a2832afad 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
@@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x2ac,
                .features = VIG_SC7180_MASK,
-               .sblk = &sm8250_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
                .name = "sspp_1", .id = SSPP_VIG1,
                .base = 0x6000, .len = 0x2ac,
                .features = VIG_SC7180_MASK,
-               .sblk = &sm8250_vig_sblk_1,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 4,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG1,
@@ -91,7 +91,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
                .name = "sspp_2", .id = SSPP_VIG2,
                .base = 0x8000, .len = 0x2ac,
                .features = VIG_SC7180_MASK,
-               .sblk = &sm8250_vig_sblk_2,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 8,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG2,
@@ -99,7 +99,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
                .name = "sspp_3", .id = SSPP_VIG3,
                .base = 0xa000, .len = 0x2ac,
                .features = VIG_SC7180_MASK,
-               .sblk = &sm8250_vig_sblk_3,
+               .sblk = &dpu_vig_sblk_qseed3_3_0,
                .xin_id = 12,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG3,
@@ -107,7 +107,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x2ac,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
@@ -115,7 +115,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x2ac,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,
@@ -123,7 +123,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x2ac,
                .features = DMA_CURSOR_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_2,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA2,
@@ -131,7 +131,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
                .name = "sspp_11", .id = SSPP_DMA3,
                .base = 0x2a000, .len = 0x2ac,
                .features = DMA_CURSOR_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_3,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 13,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA3,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
index 330d48b1ea02809267373219edc3afdea4ba8014..0559ef780661cb2f4b3bb3febbacda2f6ca0378c 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
@@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x32c,
                .features = VIG_SC7180_MASK_SDMA,
-               .sblk = &sm8450_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_3_1,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
@@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
                .name = "sspp_1", .id = SSPP_VIG1,
                .base = 0x6000, .len = 0x32c,
                .features = VIG_SC7180_MASK_SDMA,
-               .sblk = &sm8450_vig_sblk_1,
+               .sblk = &dpu_vig_sblk_qseed3_3_1,
                .xin_id = 4,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG1,
@@ -91,7 +91,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
                .name = "sspp_2", .id = SSPP_VIG2,
                .base = 0x8000, .len = 0x32c,
                .features = VIG_SC7180_MASK_SDMA,
-               .sblk = &sm8450_vig_sblk_2,
+               .sblk = &dpu_vig_sblk_qseed3_3_1,
                .xin_id = 8,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG2,
@@ -99,7 +99,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
                .name = "sspp_3", .id = SSPP_VIG3,
                .base = 0xa000, .len = 0x32c,
                .features = VIG_SC7180_MASK_SDMA,
-               .sblk = &sm8450_vig_sblk_3,
+               .sblk = &dpu_vig_sblk_qseed3_3_1,
                .xin_id = 12,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG3,
@@ -107,7 +107,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x32c,
                .features = DMA_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
@@ -115,7 +115,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x32c,
                .features = DMA_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,
@@ -123,7 +123,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x32c,
                .features = DMA_CURSOR_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_2,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA2,
@@ -131,7 +131,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
                .name = "sspp_11", .id = SSPP_DMA3,
                .base = 0x2a000, .len = 0x32c,
                .features = DMA_CURSOR_SDM845_MASK_SDMA,
-               .sblk = &sdm845_dma_sblk_3,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 13,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA3,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
index 2b5b342ea0b2567c380d3e30f20c601b269c591d..f393d42317af381f5f48e368f1a9caeb37dca87b 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
@@ -67,70 +67,70 @@ static const struct dpu_sspp_cfg sm8550_sspp[] = {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x344,
                .features = VIG_SC7180_MASK,
-               .sblk = &sm8550_vig_sblk_0,
+               .sblk = &dpu_vig_sblk_qseed3_3_2,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
        }, {
                .name = "sspp_1", .id = SSPP_VIG1,
                .base = 0x6000, .len = 0x344,
                .features = VIG_SC7180_MASK,
-               .sblk = &sm8550_vig_sblk_1,
+               .sblk = &dpu_vig_sblk_qseed3_3_2,
                .xin_id = 4,
                .type = SSPP_TYPE_VIG,
        }, {
                .name = "sspp_2", .id = SSPP_VIG2,
                .base = 0x8000, .len = 0x344,
                .features = VIG_SC7180_MASK,
-               .sblk = &sm8550_vig_sblk_2,
+               .sblk = &dpu_vig_sblk_qseed3_3_2,
                .xin_id = 8,
                .type = SSPP_TYPE_VIG,
        }, {
                .name = "sspp_3", .id = SSPP_VIG3,
                .base = 0xa000, .len = 0x344,
                .features = VIG_SC7180_MASK,
-               .sblk = &sm8550_vig_sblk_3,
+               .sblk = &dpu_vig_sblk_qseed3_3_2,
                .xin_id = 12,
                .type = SSPP_TYPE_VIG,
        }, {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x344,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_0,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
        }, {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x344,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_1,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
        }, {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x344,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_2,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
        }, {
                .name = "sspp_11", .id = SSPP_DMA3,
                .base = 0x2a000, .len = 0x344,
                .features = DMA_SDM845_MASK,
-               .sblk = &sdm845_dma_sblk_3,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 13,
                .type = SSPP_TYPE_DMA,
        }, {
                .name = "sspp_12", .id = SSPP_DMA4,
                .base = 0x2c000, .len = 0x344,
                .features = DMA_CURSOR_SDM845_MASK,
-               .sblk = &sm8550_dma_sblk_4,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 14,
                .type = SSPP_TYPE_DMA,
        }, {
                .name = "sspp_13", .id = SSPP_DMA5,
                .base = 0x2e000, .len = 0x344,
                .features = DMA_CURSOR_SDM845_MASK,
-               .sblk = &sm8550_dma_sblk_5,
+               .sblk = &dpu_dma_sblk,
                .xin_id = 15,
                .type = SSPP_TYPE_DMA,
        },

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 4179174ee4ee78906a8412761c179bd2179eb270..b8ea33d0f364fa35c83584f22e701c6e99815331 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -284,6 +284,16 @@ static const uint32_t wb2_formats[] = {
        .rotation_cfg = rot_cfg, \
        }
 
+#define _VIG_SBLK_NOSCALE() \
+       { \
+       .maxdwnscale = SSPP_UNITY_SCALE, \
+       .maxupscale = SSPP_UNITY_SCALE, \
+       .format_list = plane_formats_yuv, \
+       .num_formats = ARRAY_SIZE(plane_formats_yuv), \
+       .virt_format_list = plane_formats, \
+       .virt_num_formats = ARRAY_SIZE(plane_formats), \
+       }
+
 #define _DMA_SBLK() \
        { \
        .maxdwnscale = SSPP_UNITY_SCALE, \
@@ -294,98 +304,41 @@ static const uint32_t wb2_formats[] = {
        .virt_num_formats = ARRAY_SIZE(plane_formats), \
        }
 
-static const struct dpu_sspp_sub_blks msm8998_vig_sblk_0 =
-                               _VIG_SBLK(SSPP_SCALER_VER(1, 2));
-static const struct dpu_sspp_sub_blks msm8998_vig_sblk_1 =
-                               _VIG_SBLK(SSPP_SCALER_VER(1, 2));
-static const struct dpu_sspp_sub_blks msm8998_vig_sblk_2 =
-                               _VIG_SBLK(SSPP_SCALER_VER(1, 2));
-static const struct dpu_sspp_sub_blks msm8998_vig_sblk_3 =
-                               _VIG_SBLK(SSPP_SCALER_VER(1, 2));
-
 static const struct dpu_rotation_cfg dpu_rot_sc7280_cfg_v2 = {
        .rot_maxheight = 1088,
        .rot_num_formats = ARRAY_SIZE(rotation_v2_formats),
        .rot_format_list = rotation_v2_formats,
 };
 
-static const struct dpu_sspp_sub_blks sdm845_vig_sblk_0 =
-                               _VIG_SBLK(SSPP_SCALER_VER(1, 3));
-static const struct dpu_sspp_sub_blks sdm845_vig_sblk_1 =
-                               _VIG_SBLK(SSPP_SCALER_VER(1, 3));
-static const struct dpu_sspp_sub_blks sdm845_vig_sblk_2 =
-                               _VIG_SBLK(SSPP_SCALER_VER(1, 3));
-static const struct dpu_sspp_sub_blks sdm845_vig_sblk_3 =
+static const struct dpu_sspp_sub_blks dpu_vig_sblk_noscale =
+                               _VIG_SBLK_NOSCALE();
+
+static const struct dpu_sspp_sub_blks dpu_vig_sblk_qseed3_1_2 =
+                               _VIG_SBLK(SSPP_SCALER_VER(1, 2));
+
+static const struct dpu_sspp_sub_blks dpu_vig_sblk_qseed3_1_3 =
                                _VIG_SBLK(SSPP_SCALER_VER(1, 3));
 
-static const struct dpu_sspp_sub_blks sm8150_vig_sblk_0 =
-                               _VIG_SBLK(SSPP_SCALER_VER(1, 4));
-static const struct dpu_sspp_sub_blks sm8150_vig_sblk_1 =
-                               _VIG_SBLK(SSPP_SCALER_VER(1, 4));
-static const struct dpu_sspp_sub_blks sm8150_vig_sblk_2 =
-                               _VIG_SBLK(SSPP_SCALER_VER(1, 4));
-static const struct dpu_sspp_sub_blks sm8150_vig_sblk_3 =
+static const struct dpu_sspp_sub_blks dpu_vig_sblk_qseed3_1_4 =
                                _VIG_SBLK(SSPP_SCALER_VER(1, 4));
 
-static const struct dpu_sspp_sub_blks sdm845_dma_sblk_0 = _DMA_SBLK();
-static const struct dpu_sspp_sub_blks sdm845_dma_sblk_1 = _DMA_SBLK();
-static const struct dpu_sspp_sub_blks sdm845_dma_sblk_2 = _DMA_SBLK();
-static const struct dpu_sspp_sub_blks sdm845_dma_sblk_3 = _DMA_SBLK();
+static const struct dpu_sspp_sub_blks dpu_vig_sblk_qseed3_2_4 =
+                               _VIG_SBLK(SSPP_SCALER_VER(2, 4));
 
-static const struct dpu_sspp_sub_blks sc7180_vig_sblk_0 =
+static const struct dpu_sspp_sub_blks dpu_vig_sblk_qseed3_3_0 =
                                _VIG_SBLK(SSPP_SCALER_VER(3, 0));
 
-static const struct dpu_sspp_sub_blks sc7280_vig_sblk_0 =
+static const struct dpu_sspp_sub_blks dpu_vig_sblk_qseed3_3_0_rot_v2 =
                        _VIG_SBLK_ROT(SSPP_SCALER_VER(3, 0),
                                      &dpu_rot_sc7280_cfg_v2);
 
-static const struct dpu_sspp_sub_blks sm6115_vig_sblk_0 =
-                               _VIG_SBLK(SSPP_SCALER_VER(3, 0));
-
-static const struct dpu_sspp_sub_blks sm6125_vig_sblk_0 =
-                               _VIG_SBLK(SSPP_SCALER_VER(2, 4));
-
-static const struct dpu_sspp_sub_blks sm8250_vig_sblk_0 =
-                               _VIG_SBLK(SSPP_SCALER_VER(3, 0));
-static const struct dpu_sspp_sub_blks sm8250_vig_sblk_1 =
-                               _VIG_SBLK(SSPP_SCALER_VER(3, 0));
-static const struct dpu_sspp_sub_blks sm8250_vig_sblk_2 =
-                               _VIG_SBLK(SSPP_SCALER_VER(3, 0));
-static const struct dpu_sspp_sub_blks sm8250_vig_sblk_3 =
-                               _VIG_SBLK(SSPP_SCALER_VER(3, 0));
-
-static const struct dpu_sspp_sub_blks sm8450_vig_sblk_0 =
-                               _VIG_SBLK(SSPP_SCALER_VER(3, 1));
-static const struct dpu_sspp_sub_blks sm8450_vig_sblk_1 =
-                               _VIG_SBLK(SSPP_SCALER_VER(3, 1));
-static const struct dpu_sspp_sub_blks sm8450_vig_sblk_2 =
-                               _VIG_SBLK(SSPP_SCALER_VER(3, 1));
-static const struct dpu_sspp_sub_blks sm8450_vig_sblk_3 =
+static const struct dpu_sspp_sub_blks dpu_vig_sblk_qseed3_3_1 =
                                _VIG_SBLK(SSPP_SCALER_VER(3, 1));
 
-static const struct dpu_sspp_sub_blks sm8550_vig_sblk_0 =
-                               _VIG_SBLK(SSPP_SCALER_VER(3, 2));
-static const struct dpu_sspp_sub_blks sm8550_vig_sblk_1 =
+static const struct dpu_sspp_sub_blks dpu_vig_sblk_qseed3_3_2 =
                                _VIG_SBLK(SSPP_SCALER_VER(3, 2));
-static const struct dpu_sspp_sub_blks sm8550_vig_sblk_2 =
-                               _VIG_SBLK(SSPP_SCALER_VER(3, 2));
-static const struct dpu_sspp_sub_blks sm8550_vig_sblk_3 =
-                               _VIG_SBLK(SSPP_SCALER_VER(3, 2));
-static const struct dpu_sspp_sub_blks sm8550_dma_sblk_4 = _DMA_SBLK();
-static const struct dpu_sspp_sub_blks sm8550_dma_sblk_5 = _DMA_SBLK();
-
-#define _VIG_SBLK_NOSCALE() \
-       { \
-       .maxdwnscale = SSPP_UNITY_SCALE, \
-       .maxupscale = SSPP_UNITY_SCALE, \
-       .format_list = plane_formats_yuv, \
-       .num_formats = ARRAY_SIZE(plane_formats_yuv), \
-       .virt_format_list = plane_formats, \
-       .virt_num_formats = ARRAY_SIZE(plane_formats), \
-       }
 
-static const struct dpu_sspp_sub_blks qcm2290_vig_sblk_0 = _VIG_SBLK_NOSCALE();
-static const struct dpu_sspp_sub_blks qcm2290_dma_sblk_0 = _DMA_SBLK();
+static const struct dpu_sspp_sub_blks dpu_dma_sblk = _DMA_SBLK();
 
 /*************************************************************
  * MIXER sub blocks config