local_irq_disable();
 
-       cycle_time = card->driver->read_csr_reg(card, CSR_CYCLE_TIME);
+       cycle_time = card->driver->read_csr(card, CSR_CYCLE_TIME);
 
        switch (a->clk_id) {
        case CLOCK_REALTIME:      getnstimeofday(&ts);                   break;
 
        case CSR_BUS_TIME:
        case CSR_BUSY_TIMEOUT:
                if (tcode == TCODE_READ_QUADLET_REQUEST)
-                       *data = cpu_to_be32(card->driver->
-                                           read_csr_reg(card, reg));
+                       *data = cpu_to_be32(card->driver->read_csr(card, reg));
                else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
-                       card->driver->write_csr_reg(card, reg,
-                                                   be32_to_cpu(*data));
+                       card->driver->write_csr(card, reg, be32_to_cpu(*data));
                else
                        rcode = RCODE_TYPE_ERROR;
                break;
 
        case CSR_RESET_START:
                if (tcode == TCODE_WRITE_QUADLET_REQUEST)
-                       card->driver->write_csr_reg(card, CSR_STATE_CLEAR,
-                                                   CSR_STATE_BIT_ABDICATE);
+                       card->driver->write_csr(card, CSR_STATE_CLEAR,
+                                               CSR_STATE_BIT_ABDICATE);
                else
                        rcode = RCODE_TYPE_ERROR;
                break;
 
        int (*enable_phys_dma)(struct fw_card *card,
                               int node_id, int generation);
 
-       u32 (*read_csr_reg)(struct fw_card *card, int csr_offset);
-       void (*write_csr_reg)(struct fw_card *card, int csr_offset, u32 value);
+       u32 (*read_csr)(struct fw_card *card, int csr_offset);
+       void (*write_csr)(struct fw_card *card, int csr_offset, u32 value);
 
        struct fw_iso_context *
        (*allocate_iso_context)(struct fw_card *card,
 
 #endif /* CONFIG_FIREWIRE_OHCI_REMOTE_DMA */
 }
 
-static u32 ohci_read_csr_reg(struct fw_card *card, int csr_offset)
+static u32 ohci_read_csr(struct fw_card *card, int csr_offset)
 {
        struct fw_ohci *ohci = fw_ohci(card);
        unsigned long flags;
        }
 }
 
-static void ohci_write_csr_reg(struct fw_card *card, int csr_offset, u32 value)
+static void ohci_write_csr(struct fw_card *card, int csr_offset, u32 value)
 {
        struct fw_ohci *ohci = fw_ohci(card);
        unsigned long flags;
        .send_response          = ohci_send_response,
        .cancel_packet          = ohci_cancel_packet,
        .enable_phys_dma        = ohci_enable_phys_dma,
-       .read_csr_reg           = ohci_read_csr_reg,
-       .write_csr_reg          = ohci_write_csr_reg,
+       .read_csr               = ohci_read_csr,
+       .write_csr              = ohci_write_csr,
 
        .allocate_iso_context   = ohci_allocate_iso_context,
        .free_iso_context       = ohci_free_iso_context,