drm/i915: Push the use-semaphore marker onto the intel_context

Instead of rummaging through the intel_context to peek at the GEM
context in the middle of request submission to decide whether to use
semaphores, store that information on the intel_context itself.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191220101230.256839-2-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 42585a20a9ae139d66ab0938e43164221efa8abd..e488bd8a6b5e6144ecfa3b86adfc646ca925ba36 100644 (file)
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1852,6 +1852,44 @@ set_persistence(struct i915_gem_context *ctx,
        return __context_set_persistence(ctx, args->value);
 }
 
+static void __apply_priority(struct intel_context *ce, void *arg)
+{
+       struct i915_gem_context *ctx = arg;
+
+       if (!intel_engine_has_semaphores(ce->engine))
+               return;
+
+       if (ctx->sched.priority >= I915_PRIORITY_NORMAL)
+               intel_context_set_use_semaphores(ce);
+       else
+               intel_context_clear_use_semaphores(ce);
+}
+
+static int set_priority(struct i915_gem_context *ctx,
+                       const struct drm_i915_gem_context_param *args)
+{
+       s64 priority = args->value;
+
+       if (args->size)
+               return -EINVAL;
+
+       if (!(ctx->i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
+               return -ENODEV;
+
+       if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
+           priority < I915_CONTEXT_MIN_USER_PRIORITY)
+               return -EINVAL;
+
+       if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
+           !capable(CAP_SYS_NICE))
+               return -EPERM;
+
+       ctx->sched.priority = I915_USER_PRIORITY(priority);
+       context_apply_all(ctx, __apply_priority, ctx);
+
+       return 0;
+}
+
 static int ctx_setparam(struct drm_i915_file_private *fpriv,
                        struct i915_gem_context *ctx,
                        struct drm_i915_gem_context_param *args)
@@ -1898,23 +1936,7 @@ static int ctx_setparam(struct drm_i915_file_private *fpriv,
                break;
 
        case I915_CONTEXT_PARAM_PRIORITY:
-               {
-                       s64 priority = args->value;
-
-                       if (args->size)
-                               ret = -EINVAL;
-                       else if (!(ctx->i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
-                               ret = -ENODEV;
-                       else if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
-                                priority < I915_CONTEXT_MIN_USER_PRIORITY)
-                               ret = -EINVAL;
-                       else if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
-                                !capable(CAP_SYS_NICE))
-                               ret = -EPERM;
-                       else
-                               ctx->sched.priority =
-                                       I915_USER_PRIORITY(priority);
-               }
+               ret = set_priority(ctx, args);
                break;
 
        case I915_CONTEXT_PARAM_SSEU:

diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c
index ae0dc40031df9d2aa5d592f43989b358cc459248..e73e976e5ecdcc9ed28edb013981bc7d555db0a3 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -233,6 +233,9 @@ intel_context_init(struct intel_context *ce,
        rcu_read_unlock();
        if (ctx->timeline)
                ce->timeline = intel_timeline_get(ctx->timeline);
+       if (ctx->sched.priority >= I915_PRIORITY_NORMAL &&
+           intel_engine_has_semaphores(engine))
+               __set_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
 
        ce->engine = engine;
        ce->ops = engine->cops;

diff --git a/drivers/gpu/drm/i915/gt/intel_context.h b/drivers/gpu/drm/i915/gt/intel_context.h
index 65389cb8a565c51bf5714c5fd1bbeb096f0f767a..e7ac7027969f951fc8c10d9f78573111bbfed630 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -162,6 +162,21 @@ static inline struct intel_ring *__intel_context_ring_size(u64 sz)
        return u64_to_ptr(struct intel_ring, sz);
 }
 
+static inline bool intel_context_use_semaphores(const struct intel_context *ce)
+{
+       return test_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
+}
+
+static inline void intel_context_set_use_semaphores(struct intel_context *ce)
+{
+       set_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
+}
+
+static inline void intel_context_clear_use_semaphores(struct intel_context *ce)
+{
+       clear_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
+}
+
 static inline bool intel_context_is_banned(const struct intel_context *ce)
 {
        return test_bit(CONTEXT_BANNED, &ce->flags);

diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h b/drivers/gpu/drm/i915/gt/intel_context_types.h
index 597448f6e98bf4c3744780f086b54bbd942615d6..af0d55b111f5d7416e1cbb351e57ca01c5a801c3 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -56,9 +56,10 @@ struct intel_context {
        unsigned long flags;
 #define CONTEXT_ALLOC_BIT              0
 #define CONTEXT_VALID_BIT              1
-#define CONTEXT_BANNED                 2
-#define CONTEXT_FORCE_SINGLE_SUBMISSION        3
-#define CONTEXT_NOPREEMPT              4
+#define CONTEXT_USE_SEMAPHORES         2
+#define CONTEXT_BANNED                 3
+#define CONTEXT_FORCE_SINGLE_SUBMISSION        4
+#define CONTEXT_NOPREEMPT              5
 
        u32 *lrc_reg_state;
        u64 lrc_desc;

diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 218d20d4e414e3876441a1ba3b07e080f3842b1b..ed70d8dcea746f504df81d72342bbd4a27326630 100644 (file)
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -917,18 +917,16 @@ i915_request_await_request(struct i915_request *to, struct i915_request *from)
                        return ret;
        }
 
-       if (to->engine == from->engine) {
+       if (to->engine == from->engine)
                ret = i915_sw_fence_await_sw_fence_gfp(&to->submit,
                                                       &from->submit,
                                                       I915_FENCE_GFP);
-       } else if (intel_engine_has_semaphores(to->engine) &&
-                  to->context->gem_context->sched.priority >= I915_PRIORITY_NORMAL) {
+       else if (intel_context_use_semaphores(to->context))
                ret = emit_semaphore_wait(to, from, I915_FENCE_GFP);
-       } else {
+       else
                ret = i915_sw_fence_await_dma_fence(&to->submit,
                                                    &from->fence, 0,
                                                    I915_FENCE_GFP);
-       }
        if (ret < 0)
                return ret;