media: cedrus: h265: Associate mv col buffers with buffer

Currently mv col aux buffers are allocated as a pool. This is not
optimal because pool size equals number of buffers before stream is
started. Buffers can easily be allocated afterwards. In such cases,
invalid pointer is assigned to the decoding frame and Cedrus might
overwrite memory location which is allocated to different task.

Solve this issue with allocating mv col buffer once capture buffer is
actually used.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h
index 93a2196006f7378cc293ea152b5dac5e26aaaa46..cb99610f3e1281e593d330d8155f6da62111badb 100644 (file)
--- a/drivers/staging/media/sunxi/cedrus/cedrus.h
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.h
@@ -109,6 +109,11 @@ struct cedrus_buffer {
                        unsigned int                    position;
                        enum cedrus_h264_pic_type       pic_type;
                } h264;
+               struct {
+                       void            *mv_col_buf;
+                       dma_addr_t      mv_col_buf_dma;
+                       ssize_t         mv_col_buf_size;
+               } h265;
        } codec;
 };
 
@@ -142,10 +147,6 @@ struct cedrus_ctx {
                        ssize_t         intra_pred_buf_size;
                } h264;
                struct {
-                       void            *mv_col_buf;
-                       dma_addr_t      mv_col_buf_addr;
-                       ssize_t         mv_col_buf_size;
-                       ssize_t         mv_col_buf_unit_size;
                        void            *neighbor_info_buf;
                        dma_addr_t      neighbor_info_buf_addr;
                        void            *entry_points_buf;

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
index 625f77a8c5bde59ea79284188203a9ac5f3e7a27..7a438cd22c34184bcc871351f7b65f407e0109a7 100644 (file)
--- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
@@ -90,12 +90,13 @@ static void cedrus_h265_sram_write_data(struct cedrus_dev *dev, void *data,
 }
 
 static inline dma_addr_t
-cedrus_h265_frame_info_mv_col_buf_addr(struct cedrus_ctx *ctx,
-                                      unsigned int index, unsigned int field)
+cedrus_h265_frame_info_mv_col_buf_addr(struct vb2_buffer *buf,
+                                      unsigned int field)
 {
-       return ctx->codec.h265.mv_col_buf_addr + index *
-              ctx->codec.h265.mv_col_buf_unit_size +
-              field * ctx->codec.h265.mv_col_buf_unit_size / 2;
+       struct cedrus_buffer *cedrus_buf = vb2_to_cedrus_buffer(buf);
+
+       return cedrus_buf->codec.h265.mv_col_buf_dma +
+              field * cedrus_buf->codec.h265.mv_col_buf_size / 2;
 }
 
 static void cedrus_h265_frame_info_write_single(struct cedrus_ctx *ctx,
@@ -108,9 +109,8 @@ static void cedrus_h265_frame_info_write_single(struct cedrus_ctx *ctx,
        dma_addr_t dst_luma_addr = cedrus_dst_buf_addr(ctx, buf, 0);
        dma_addr_t dst_chroma_addr = cedrus_dst_buf_addr(ctx, buf, 1);
        dma_addr_t mv_col_buf_addr[2] = {
-               cedrus_h265_frame_info_mv_col_buf_addr(ctx, buf->index, 0),
-               cedrus_h265_frame_info_mv_col_buf_addr(ctx, buf->index,
-                                                      field_pic ? 1 : 0)
+               cedrus_h265_frame_info_mv_col_buf_addr(buf, 0),
+               cedrus_h265_frame_info_mv_col_buf_addr(buf, field_pic ? 1 : 0)
        };
        u32 offset = VE_DEC_H265_SRAM_OFFSET_FRAME_INFO +
                     VE_DEC_H265_SRAM_OFFSET_FRAME_INFO_UNIT * index;
@@ -412,6 +412,7 @@ static int cedrus_h265_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
        unsigned int width_in_ctb_luma, ctb_size_luma;
        unsigned int log2_max_luma_coding_block_size;
        unsigned int ctb_addr_x, ctb_addr_y;
+       struct cedrus_buffer *cedrus_buf;
        dma_addr_t src_buf_addr;
        dma_addr_t src_buf_end_addr;
        u32 chroma_log2_weight_denom;
@@ -428,6 +429,7 @@ static int cedrus_h265_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
        decode_params = run->h265.decode_params;
        pred_weight_table = &slice_params->pred_weight_table;
        num_entry_point_offsets = slice_params->num_entry_point_offsets;
+       cedrus_buf = vb2_to_cedrus_buffer(&run->dst->vb2_buf);
 
        /*
         * If entry points offsets are present, we should get them
@@ -445,31 +447,25 @@ static int cedrus_h265_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
                DIV_ROUND_UP(sps->pic_width_in_luma_samples, ctb_size_luma);
 
        /* MV column buffer size and allocation. */
-       if (!ctx->codec.h265.mv_col_buf_size) {
-               unsigned int num_buffers =
-                       run->dst->vb2_buf.vb2_queue->num_buffers;
-
+       if (!cedrus_buf->codec.h265.mv_col_buf_size) {
                /*
                 * Each CTB requires a MV col buffer with a specific unit size.
                 * Since the address is given with missing lsb bits, 1 KiB is
                 * added to each buffer to ensure proper alignment.
                 */
-               ctx->codec.h265.mv_col_buf_unit_size =
+               cedrus_buf->codec.h265.mv_col_buf_size =
                        DIV_ROUND_UP(ctx->src_fmt.width, ctb_size_luma) *
                        DIV_ROUND_UP(ctx->src_fmt.height, ctb_size_luma) *
                        CEDRUS_H265_MV_COL_BUF_UNIT_CTB_SIZE + SZ_1K;
 
-               ctx->codec.h265.mv_col_buf_size = num_buffers *
-                       ctx->codec.h265.mv_col_buf_unit_size;
-
                /* Buffer is never accessed by CPU, so we can skip kernel mapping. */
-               ctx->codec.h265.mv_col_buf =
+               cedrus_buf->codec.h265.mv_col_buf =
                        dma_alloc_attrs(dev->dev,
-                                       ctx->codec.h265.mv_col_buf_size,
-                                       &ctx->codec.h265.mv_col_buf_addr,
+                                       cedrus_buf->codec.h265.mv_col_buf_size,
+                                       &cedrus_buf->codec.h265.mv_col_buf_dma,
                                        GFP_KERNEL, DMA_ATTR_NO_KERNEL_MAPPING);
-               if (!ctx->codec.h265.mv_col_buf) {
-                       ctx->codec.h265.mv_col_buf_size = 0;
+               if (!cedrus_buf->codec.h265.mv_col_buf) {
+                       cedrus_buf->codec.h265.mv_col_buf_size = 0;
                        return -ENOMEM;
                }
        }
@@ -816,9 +812,6 @@ static int cedrus_h265_start(struct cedrus_ctx *ctx)
 {
        struct cedrus_dev *dev = ctx->dev;
 
-       /* The buffer size is calculated at setup time. */
-       ctx->codec.h265.mv_col_buf_size = 0;
-
        /* Buffer is never accessed by CPU, so we can skip kernel mapping. */
        ctx->codec.h265.neighbor_info_buf =
                dma_alloc_attrs(dev->dev, CEDRUS_H265_NEIGHBOR_INFO_BUF_SIZE,
@@ -845,14 +838,24 @@ static int cedrus_h265_start(struct cedrus_ctx *ctx)
 static void cedrus_h265_stop(struct cedrus_ctx *ctx)
 {
        struct cedrus_dev *dev = ctx->dev;
+       struct cedrus_buffer *buf;
+       struct vb2_queue *vq;
+       unsigned int i;
 
-       if (ctx->codec.h265.mv_col_buf_size > 0) {
-               dma_free_attrs(dev->dev, ctx->codec.h265.mv_col_buf_size,
-                              ctx->codec.h265.mv_col_buf,
-                              ctx->codec.h265.mv_col_buf_addr,
-                              DMA_ATTR_NO_KERNEL_MAPPING);
+       vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
+
+       for (i = 0; i < vq->num_buffers; i++) {
+               buf = vb2_to_cedrus_buffer(vb2_get_buffer(vq, i));
 
-               ctx->codec.h265.mv_col_buf_size = 0;
+               if (buf->codec.h265.mv_col_buf_size > 0) {
+                       dma_free_attrs(dev->dev,
+                                      buf->codec.h265.mv_col_buf_size,
+                                      buf->codec.h265.mv_col_buf,
+                                      buf->codec.h265.mv_col_buf_dma,
+                                      DMA_ATTR_NO_KERNEL_MAPPING);
+
+                       buf->codec.h265.mv_col_buf_size = 0;
+               }
        }
 
        dma_free_attrs(dev->dev, CEDRUS_H265_NEIGHBOR_INFO_BUF_SIZE,