.non_legacy_dai_naming  = 1,
 };
 
+/* Switch to SCLK. Atomic delay after the write to allow the switch to complete. */
+static const struct reg_sequence cs42l42_to_sclk_seq[] = {
+       {
+               .reg = CS42L42_OSC_SWITCH,
+               .def = CS42L42_SCLK_PRESENT_MASK,
+               .delay_us = CS42L42_CLOCK_SWITCH_DELAY_US,
+       },
+};
+
+/* Switch to OSC. Atomic delay after the write to allow the switch to complete. */
+static const struct reg_sequence cs42l42_to_osc_seq[] = {
+       {
+               .reg = CS42L42_OSC_SWITCH,
+               .def = 0,
+               .delay_us = CS42L42_CLOCK_SWITCH_DELAY_US,
+       },
+};
+
 struct cs42l42_pll_params {
        u32 sclk;
        u8 mclk_div;
                         * SCLK must remain running until after this clock switch.
                         * Without a source of clock the I2C bus doesn't work.
                         */
-                       snd_soc_component_update_bits(component, CS42L42_OSC_SWITCH,
-                                                     CS42L42_SCLK_PRESENT_MASK, 0);
+                       regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_osc_seq,
+                                              ARRAY_SIZE(cs42l42_to_osc_seq));
                        snd_soc_component_update_bits(component, CS42L42_PLL_CTL1,
                                                      CS42L42_PLL_START_MASK, 0);
                }
                                                      CS42L42_PLL_START_MASK, 1);
 
                        /* Mark SCLK as present, turn off internal oscillator */
-                       snd_soc_component_update_bits(component, CS42L42_OSC_SWITCH,
-                                                     CS42L42_SCLK_PRESENT_MASK,
-                                                     CS42L42_SCLK_PRESENT_MASK);
+                       regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_sclk_seq,
+                                              ARRAY_SIZE(cs42l42_to_sclk_seq));
                }
                cs42l42->stream_use |= 1 << stream;